cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel,ixp4xx-crypto.yaml (1720B)


      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2# Copyright 2018 Linaro Ltd.
      3%YAML 1.2
      4---
      5$id: "http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml#"
      6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      7
      8title: Intel IXP4xx cryptographic engine
      9
     10maintainers:
     11  - Linus Walleij <linus.walleij@linaro.org>
     12
     13description: |
     14  The Intel IXP4xx cryptographic engine makes use of the IXP4xx NPE
     15  (Network Processing Engine). Since it is not a device on its own
     16  it is defined as a subnode of the NPE, if crypto support is
     17  available on the platform.
     18
     19properties:
     20  compatible:
     21    const: intel,ixp4xx-crypto
     22
     23  intel,npe-handle:
     24    $ref: '/schemas/types.yaml#/definitions/phandle-array'
     25    items:
     26      - items:
     27          - description: phandle to the NPE this crypto engine
     28          - description: the NPE instance number
     29    description: phandle to the NPE this crypto engine is using, the cell
     30      describing the NPE instance to be used.
     31
     32  queue-rx:
     33    $ref: /schemas/types.yaml#/definitions/phandle-array
     34    items:
     35      - items:
     36          - description: phandle to the RX queue on the NPE
     37          - description: the queue instance number
     38    description: phandle to the RX queue on the NPE, the cell describing
     39      the queue instance to be used.
     40
     41  queue-txready:
     42    $ref: /schemas/types.yaml#/definitions/phandle-array
     43    items:
     44      - items:
     45          - description: phandle to the TX READY queue on the NPE
     46          - description: the queue instance number
     47    description: phandle to the TX READY queue on the NPE, the cell describing
     48      the queue instance to be used.
     49
     50required:
     51  - compatible
     52  - intel,npe-handle
     53  - queue-rx
     54  - queue-txready
     55
     56additionalProperties: false