cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel,keembay-ocs-aes.yaml (964B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Intel Keem Bay OCS AES Device Tree Bindings
      8
      9maintainers:
     10  - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
     11
     12description:
     13  The Intel Keem Bay Offload and Crypto Subsystem (OCS) AES engine provides
     14  hardware-accelerated AES/SM4 encryption/decryption.
     15
     16properties:
     17  compatible:
     18    const: intel,keembay-ocs-aes
     19
     20  reg:
     21    maxItems: 1
     22
     23  interrupts:
     24    maxItems: 1
     25
     26  clocks:
     27    maxItems: 1
     28
     29required:
     30  - compatible
     31  - reg
     32  - interrupts
     33  - clocks
     34
     35additionalProperties: false
     36
     37examples:
     38  - |
     39    #include <dt-bindings/interrupt-controller/arm-gic.h>
     40    crypto@30008000 {
     41      compatible = "intel,keembay-ocs-aes";
     42      reg = <0x30008000 0x1000>;
     43      interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
     44      clocks = <&scmi_clk 95>;
     45    };