cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun8i-a83t-de2-mixer.yaml (2551B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-de2-mixer.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Allwinner Display Engine 2.0 Mixer Device Tree Bindings
      8
      9maintainers:
     10  - Chen-Yu Tsai <wens@csie.org>
     11  - Maxime Ripard <mripard@kernel.org>
     12
     13properties:
     14  compatible:
     15    enum:
     16      - allwinner,sun8i-a83t-de2-mixer-0
     17      - allwinner,sun8i-a83t-de2-mixer-1
     18      - allwinner,sun8i-h3-de2-mixer-0
     19      - allwinner,sun8i-r40-de2-mixer-0
     20      - allwinner,sun8i-r40-de2-mixer-1
     21      - allwinner,sun8i-v3s-de2-mixer
     22      - allwinner,sun20i-d1-de2-mixer-0
     23      - allwinner,sun20i-d1-de2-mixer-1
     24      - allwinner,sun50i-a64-de2-mixer-0
     25      - allwinner,sun50i-a64-de2-mixer-1
     26      - allwinner,sun50i-h6-de3-mixer-0
     27
     28  reg:
     29    maxItems: 1
     30
     31  clocks:
     32    items:
     33      - description: The mixer interface clock
     34      - description: The mixer module clock
     35
     36  clock-names:
     37    items:
     38      - const: bus
     39      - const: mod
     40
     41  iommus:
     42    maxItems: 1
     43
     44  resets:
     45    maxItems: 1
     46
     47  ports:
     48    $ref: /schemas/graph.yaml#/properties/ports
     49
     50    properties:
     51      port@0:
     52        $ref: /schemas/graph.yaml#/properties/port
     53        description: |
     54          Input endpoints of the controller.
     55
     56      port@1:
     57        $ref: /schemas/graph.yaml#/properties/port
     58        description: |
     59          Output endpoints of the controller.
     60
     61    required:
     62      - port@1
     63
     64required:
     65  - compatible
     66  - reg
     67  - clocks
     68  - clock-names
     69  - resets
     70  - ports
     71
     72additionalProperties: false
     73
     74examples:
     75  - |
     76    #include <dt-bindings/clock/sun8i-de2.h>
     77    #include <dt-bindings/reset/sun8i-de2.h>
     78
     79    mixer0: mixer@1100000 {
     80        compatible = "allwinner,sun8i-a83t-de2-mixer-0";
     81        reg = <0x01100000 0x100000>;
     82        clocks = <&display_clocks CLK_BUS_MIXER0>,
     83                 <&display_clocks CLK_MIXER0>;
     84        clock-names = "bus",
     85                      "mod";
     86        resets = <&display_clocks RST_MIXER0>;
     87
     88        ports {
     89            #address-cells = <1>;
     90            #size-cells = <0>;
     91
     92            mixer0_out: port@1 {
     93                #address-cells = <1>;
     94                #size-cells = <0>;
     95                reg = <1>;
     96
     97                mixer0_out_tcon0: endpoint@0 {
     98                    reg = <0>;
     99                    remote-endpoint = <&tcon0_in_mixer0>;
    100                };
    101
    102                mixer0_out_tcon1: endpoint@1 {
    103                    reg = <1>;
    104                    remote-endpoint = <&tcon1_in_mixer0>;
    105                };
    106            };
    107        };
    108    };
    109
    110...