cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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arm,hdlcd.yaml (2043B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Arm HDLCD display controller binding
      8
      9maintainers:
     10  - Liviu Dudau <Liviu.Dudau@arm.com>
     11  - Andre Przywara <andre.przywara@arm.com>
     12
     13description:
     14  The Arm HDLCD is a display controller found on several development platforms
     15  produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an
     16  RGB streamer that reads the data from a framebuffer and sends it to a single
     17  digital encoder (DVI or HDMI).
     18
     19properties:
     20  compatible:
     21    const: arm,hdlcd
     22
     23  reg:
     24    maxItems: 1
     25
     26  interrupts:
     27    maxItems: 1
     28
     29  clock-names:
     30    const: pxlclk
     31
     32  clocks:
     33    maxItems: 1
     34    description: The input reference for the pixel clock.
     35
     36  memory-region:
     37    maxItems: 1
     38    description:
     39      Phandle to a node describing memory to be used for the framebuffer.
     40      If not present, the framebuffer may be located anywhere in memory.
     41
     42  iommus:
     43    maxItems: 1
     44
     45  port:
     46    $ref: /schemas/graph.yaml#/properties/port
     47    unevaluatedProperties: false
     48    description:
     49      Output endpoint of the controller, connecting the LCD panel signals.
     50
     51additionalProperties: false
     52
     53required:
     54  - compatible
     55  - reg
     56  - interrupts
     57  - clocks
     58  - port
     59
     60examples:
     61  - |
     62    hdlcd@2b000000 {
     63        compatible = "arm,hdlcd";
     64        reg = <0x2b000000 0x1000>;
     65        interrupts = <0 85 4>;
     66        clocks = <&oscclk5>;
     67        clock-names = "pxlclk";
     68        port {
     69            hdlcd_output: endpoint {
     70                remote-endpoint = <&hdmi_enc_input>;
     71            };
     72        };
     73    };
     74
     75    /* HDMI encoder on I2C bus */
     76    i2c {
     77        #address-cells = <1>;
     78        #size-cells = <0>;
     79        hdmi-transmitter@70 {
     80            compatible = "nxp,tda998x";
     81            reg = <0x70>;
     82            port {
     83                hdmi_enc_input: endpoint {
     84                    remote-endpoint = <&hdlcd_output>;
     85                };
     86            };
     87        };
     88    };
     89...