renesas,dw-hdmi.yaml (3143B)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas R-Car DWC HDMI TX Encoder 8 9maintainers: 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 11 12description: | 13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP 14 with a companion PHY IP. 15 16allOf: 17 - $ref: synopsys,dw-hdmi.yaml# 18 19properties: 20 compatible: 21 items: 22 - enum: 23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX 24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX 25 - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX 26 - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX 27 - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX 28 - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX 29 - renesas,r8a77965-hdmi # for R-Car M3-N compatible HDMI TX 30 - const: renesas,rcar-gen3-hdmi 31 32 reg-io-width: 33 const: 1 34 35 clocks: 36 maxItems: 2 37 38 clock-names: 39 maxItems: 2 40 41 ports: 42 $ref: /schemas/graph.yaml#/properties/ports 43 44 properties: 45 port@0: 46 $ref: /schemas/graph.yaml#/properties/port 47 description: Parallel RGB input port 48 49 port@1: 50 $ref: /schemas/graph.yaml#/properties/port 51 description: HDMI output port 52 53 port@2: 54 $ref: /schemas/graph.yaml#/properties/port 55 description: Sound input port 56 57 required: 58 - port@0 59 - port@1 60 - port@2 61 62 power-domains: 63 maxItems: 1 64 65required: 66 - compatible 67 - reg 68 - clocks 69 - clock-names 70 - interrupts 71 - ports 72 73unevaluatedProperties: false 74 75examples: 76 - | 77 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 78 #include <dt-bindings/interrupt-controller/irq.h> 79 #include <dt-bindings/power/r8a7795-sysc.h> 80 81 hdmi@fead0000 { 82 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 83 reg = <0xfead0000 0x10000>; 84 interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>; 85 clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>; 86 clock-names = "iahb", "isfr"; 87 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 88 89 ports { 90 #address-cells = <1>; 91 #size-cells = <0>; 92 port@0 { 93 reg = <0>; 94 dw_hdmi0_in: endpoint { 95 remote-endpoint = <&du_out_hdmi0>; 96 }; 97 }; 98 port@1 { 99 reg = <1>; 100 rcar_dw_hdmi0_out: endpoint { 101 remote-endpoint = <&hdmi0_con>; 102 }; 103 }; 104 port@2 { 105 reg = <2>; 106 rcar_dw_hdmi0_sound_in: endpoint { 107 remote-endpoint = <&hdmi_sound_out>; 108 }; 109 }; 110 }; 111 }; 112 113 hdmi0-out { 114 compatible = "hdmi-connector"; 115 label = "HDMI0 OUT"; 116 type = "a"; 117 118 port { 119 hdmi0_con: endpoint { 120 remote-endpoint = <&rcar_dw_hdmi0_out>; 121 }; 122 }; 123 }; 124 125...