cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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simple-bridge.yaml (1970B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Transparent non-programmable DRM bridges
      8
      9maintainers:
     10  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
     11  - Maxime Ripard <mripard@kernel.org>
     12
     13description: |
     14  This binding supports transparent non-programmable bridges that don't require
     15  any configuration, with a single input and a single output.
     16
     17properties:
     18  compatible:
     19    oneOf:
     20      - items:
     21          - enum:
     22              - ti,ths8134a
     23              - ti,ths8134b
     24          - const: ti,ths8134
     25      - items:
     26          - const: corpro,gm7123
     27          - const: adi,adv7123
     28      - enum:
     29          - adi,adv7123
     30          - dumb-vga-dac
     31          - ti,opa362
     32          - ti,ths8134
     33          - ti,ths8135
     34
     35  ports:
     36    $ref: /schemas/graph.yaml#/properties/ports
     37
     38    properties:
     39      port@0:
     40        $ref: /schemas/graph.yaml#/properties/port
     41        description: The bridge input
     42
     43      port@1:
     44        $ref: /schemas/graph.yaml#/properties/port
     45        description: The bridge output
     46
     47    required:
     48      - port@0
     49      - port@1
     50
     51  enable-gpios:
     52    maxItems: 1
     53    description: GPIO controlling bridge enable
     54
     55  vdd-supply:
     56    description: Power supply for the bridge
     57
     58required:
     59  - compatible
     60  - ports
     61
     62additionalProperties: false
     63
     64examples:
     65  - |
     66    bridge {
     67        compatible = "ti,ths8134a", "ti,ths8134";
     68
     69        ports {
     70            #address-cells = <1>;
     71            #size-cells = <0>;
     72
     73            port@0 {
     74                reg = <0>;
     75
     76                vga_bridge_in: endpoint {
     77                    remote-endpoint = <&tcon0_out_vga>;
     78                };
     79            };
     80
     81            port@1 {
     82                reg = <1>;
     83
     84                vga_bridge_out: endpoint {
     85                    remote-endpoint = <&vga_con_in>;
     86                };
     87            };
     88        };
     89    };
     90
     91...