cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti,sn65dsi83.yaml (3810B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi83.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
      8
      9maintainers:
     10  - Marek Vasut <marex@denx.de>
     11
     12description: |
     13  Texas Instruments SN65DSI83 1x Single-link MIPI DSI
     14  to 1x Single-link LVDS
     15  https://www.ti.com/lit/gpn/sn65dsi83
     16  Texas Instruments SN65DSI84 1x Single-link MIPI DSI
     17  to 1x Dual-link or 2x Single-link LVDS
     18  https://www.ti.com/lit/gpn/sn65dsi84
     19
     20properties:
     21  compatible:
     22    enum:
     23      - ti,sn65dsi83
     24      - ti,sn65dsi84
     25
     26  reg:
     27    enum:
     28      - 0x2c
     29      - 0x2d
     30
     31  enable-gpios:
     32    maxItems: 1
     33    description: GPIO specifier for bridge_en pin (active high).
     34
     35  vcc-supply:
     36    description: A 1.8V power supply (see regulator/regulator.yaml).
     37
     38  ports:
     39    $ref: /schemas/graph.yaml#/properties/ports
     40
     41    properties:
     42      port@0:
     43        $ref: /schemas/graph.yaml#/$defs/port-base
     44        unevaluatedProperties: false
     45        description: Video port for MIPI DSI Channel-A input
     46
     47        properties:
     48          endpoint:
     49            $ref: /schemas/media/video-interfaces.yaml#
     50            unevaluatedProperties: false
     51
     52            properties:
     53              data-lanes:
     54                description: array of physical DSI data lane indexes.
     55                minItems: 1
     56                items:
     57                  - const: 1
     58                  - const: 2
     59                  - const: 3
     60                  - const: 4
     61
     62      port@1:
     63        $ref: /schemas/graph.yaml#/$defs/port-base
     64        unevaluatedProperties: false
     65        description: Video port for MIPI DSI Channel-B input
     66
     67        properties:
     68          endpoint:
     69            $ref: /schemas/media/video-interfaces.yaml#
     70            unevaluatedProperties: false
     71
     72            properties:
     73              data-lanes:
     74                description: array of physical DSI data lane indexes.
     75                minItems: 1
     76                items:
     77                  - const: 1
     78                  - const: 2
     79                  - const: 3
     80                  - const: 4
     81
     82      port@2:
     83        $ref: /schemas/graph.yaml#/properties/port
     84        description: Video port for LVDS Channel-A output (panel or bridge).
     85
     86      port@3:
     87        $ref: /schemas/graph.yaml#/properties/port
     88        description: Video port for LVDS Channel-B output (panel or bridge).
     89
     90    required:
     91      - port@0
     92      - port@2
     93
     94required:
     95  - compatible
     96  - reg
     97  - ports
     98
     99allOf:
    100  - if:
    101      properties:
    102        compatible:
    103          contains:
    104            const: ti,sn65dsi83
    105    then:
    106      properties:
    107        ports:
    108          properties:
    109            port@1: false
    110            port@3: false
    111
    112  - if:
    113      properties:
    114        compatible:
    115          contains:
    116            const: ti,sn65dsi84
    117    then:
    118      properties:
    119        ports:
    120          properties:
    121            port@1: false
    122
    123additionalProperties: false
    124
    125examples:
    126  - |
    127    #include <dt-bindings/gpio/gpio.h>
    128
    129    i2c {
    130        #address-cells = <1>;
    131        #size-cells = <0>;
    132
    133        bridge@2d {
    134            compatible = "ti,sn65dsi83";
    135            reg = <0x2d>;
    136
    137            enable-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
    138            vcc-supply = <&reg_sn65dsi83_1v8>;
    139
    140            ports {
    141                #address-cells = <1>;
    142                #size-cells = <0>;
    143
    144                port@0 {
    145                    reg = <0>;
    146
    147                    endpoint {
    148                        remote-endpoint = <&dsi0_out>;
    149                        data-lanes = <1 2 3 4>;
    150                    };
    151                };
    152
    153                port@2 {
    154                    reg = <2>;
    155
    156                    endpoint {
    157                        remote-endpoint = <&panel_in_lvds>;
    158                    };
    159                };
    160            };
    161        };
    162    };