cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,dcu.txt (934B)

      1Device Tree bindings for Freescale DCU DRM Driver
      2
      3Required properties:
      4- compatible:		Should be one of
      5	* "fsl,ls1021a-dcu".
      6	* "fsl,vf610-dcu".
      7
      8- reg:			Address and length of the register set for dcu.
      9- clocks:		Handle to "dcu" and "pix" clock (in the order below)
     10			This can be the same clock (e.g. LS1021a)
     11			See ../clocks/clock-bindings.txt for details.
     12- clock-names:		Should be "dcu" and "pix"
     13			See ../clocks/clock-bindings.txt for details.
     14- big-endian		Boolean property, LS1021A DCU registers are big-endian.
     15- port			Video port for the panel output
     16
     17Optional properties:
     18- fsl,tcon:		The phandle to the timing controller node.
     19
     20Examples:
     21dcu: dcu@2ce0000 {
     22	compatible = "fsl,ls1021a-dcu";
     23	reg = <0x0 0x2ce0000 0x0 0x10000>;
     24	clocks = <&platform_clk 0>, <&platform_clk 0>;
     25	clock-names = "dcu", "pix";
     26	big-endian;
     27	fsl,tcon = <&tcon>;
     28
     29	port {
     30		dcu_out: endpoint {
     31			remote-endpoint = <&panel_out>;
     32	     };
     33	};
     34};