cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,imx6-hdmi.yaml (2941B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale i.MX6 DWC HDMI TX Encoder
      8
      9maintainers:
     10  - Philipp Zabel <p.zabel@pengutronix.de>
     11
     12description: |
     13  The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
     14  with a companion PHY IP.
     15
     16allOf:
     17  - $ref: ../bridge/synopsys,dw-hdmi.yaml#
     18
     19properties:
     20  compatible:
     21    enum:
     22      - fsl,imx6dl-hdmi
     23      - fsl,imx6q-hdmi
     24
     25  reg-io-width:
     26    const: 1
     27
     28  clocks:
     29    maxItems: 2
     30
     31  clock-names:
     32    maxItems: 2
     33
     34  ddc-i2c-bus:
     35    $ref: /schemas/types.yaml#/definitions/phandle
     36    description:
     37      The HDMI DDC bus can be connected to either a system I2C master or the
     38      functionally-reduced I2C master contained in the DWC HDMI. When connected
     39      to a system I2C master this property contains a phandle to that I2C
     40      master controller.
     41
     42  gpr:
     43    $ref: /schemas/types.yaml#/definitions/phandle
     44    description:
     45      phandle to the iomuxc-gpr region containing the HDMI multiplexer control
     46      register.
     47
     48  ports:
     49    $ref: /schemas/graph.yaml#/properties/ports
     50    description: |
     51      This device has four video ports, corresponding to the four inputs of the
     52      HDMI multiplexer. Each port shall have a single endpoint.
     53
     54    properties:
     55      port@0:
     56        $ref: /schemas/graph.yaml#/properties/port
     57        description: First input of the HDMI multiplexer
     58
     59      port@1:
     60        $ref: /schemas/graph.yaml#/properties/port
     61        description: Second input of the HDMI multiplexer
     62
     63      port@2:
     64        $ref: /schemas/graph.yaml#/properties/port
     65        description: Third input of the HDMI multiplexer
     66
     67      port@3:
     68        $ref: /schemas/graph.yaml#/properties/port
     69        description: Fourth input of the HDMI multiplexer
     70
     71    anyOf:
     72      - required:
     73          - port@0
     74      - required:
     75          - port@1
     76      - required:
     77          - port@2
     78      - required:
     79          - port@3
     80
     81required:
     82  - compatible
     83  - reg
     84  - clocks
     85  - clock-names
     86  - gpr
     87  - interrupts
     88  - ports
     89
     90additionalProperties: false
     91
     92examples:
     93  - |
     94    #include <dt-bindings/clock/imx6qdl-clock.h>
     95
     96    hdmi: hdmi@120000 {
     97        reg = <0x00120000 0x9000>;
     98        interrupts = <0 115 0x04>;
     99        gpr = <&gpr>;
    100        clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>,
    101                 <&clks IMX6QDL_CLK_HDMI_ISFR>;
    102        clock-names = "iahb", "isfr";
    103
    104        ports {
    105            #address-cells = <1>;
    106            #size-cells = <0>;
    107
    108            port@0 {
    109                reg = <0>;
    110
    111                hdmi_mux_0: endpoint {
    112                    remote-endpoint = <&ipu1_di0_hdmi>;
    113                };
    114            };
    115
    116            port@1 {
    117                reg = <1>;
    118
    119                hdmi_mux_1: endpoint {
    120                    remote-endpoint = <&ipu1_di1_hdmi>;
    121                };
    122            };
    123        };
    124    };
    125
    126...