cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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panel-timing.yaml (6969B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: panel timing bindings
      8
      9maintainers:
     10  - Thierry Reding <thierry.reding@gmail.com>
     11  - Sam Ravnborg <sam@ravnborg.org>
     12
     13description: |
     14  There are different ways of describing the timing data of a panel. The
     15  devicetree representation corresponds to the one commonly found in datasheets
     16  for panels.
     17
     18  The parameters are defined as seen in the following illustration.
     19
     20  +----------+-------------------------------------+----------+-------+
     21  |          |        ^                            |          |       |
     22  |          |        |vback_porch                 |          |       |
     23  |          |        v                            |          |       |
     24  +----------#######################################----------+-------+
     25  |          #        ^                            #          |       |
     26  |          #        |                            #          |       |
     27  |  hback   #        |                            #  hfront  | hsync |
     28  |   porch  #        |       hactive              #  porch   |  len  |
     29  |<-------->#<-------+--------------------------->#<-------->|<----->|
     30  |          #        |                            #          |       |
     31  |          #        |vactive                     #          |       |
     32  |          #        |                            #          |       |
     33  |          #        v                            #          |       |
     34  +----------#######################################----------+-------+
     35  |          |        ^                            |          |       |
     36  |          |        |vfront_porch                |          |       |
     37  |          |        v                            |          |       |
     38  +----------+-------------------------------------+----------+-------+
     39  |          |        ^                            |          |       |
     40  |          |        |vsync_len                   |          |       |
     41  |          |        v                            |          |       |
     42  +----------+-------------------------------------+----------+-------+
     43
     44
     45  The following is the panel timings shown with time on the x-axis.
     46  This matches the timing diagrams often found in data sheets.
     47
     48              Active                 Front           Sync           Back
     49              Region                 Porch                          Porch
     50  <-----------------------><----------------><-------------><-------------->
     51    //////////////////////|
     52   ////////////////////// |
     53  //////////////////////  |..................               ................
     54                                             _______________
     55
     56  Timing can be specified either as a typical value or as a tuple
     57  of min, typ, max values.
     58
     59properties:
     60
     61  clock-frequency:
     62    description: Panel clock in Hz
     63
     64  hactive:
     65    $ref: /schemas/types.yaml#/definitions/uint32
     66    description: Horizontal panel resolution in pixels
     67
     68  vactive:
     69    $ref: /schemas/types.yaml#/definitions/uint32
     70    description: Vertical panel resolution in pixels
     71
     72  hfront-porch:
     73    description: Horizontal front porch panel timing
     74    $ref: /schemas/types.yaml#/definitions/uint32-array
     75    oneOf:
     76      - maxItems: 1
     77        items:
     78          description: typical number of pixels
     79      - minItems: 3
     80        maxItems: 3
     81        items:
     82          description: min, typ, max number of pixels
     83
     84  hback-porch:
     85    description: Horizontal back porch timing
     86    $ref: /schemas/types.yaml#/definitions/uint32-array
     87    oneOf:
     88      - maxItems: 1
     89        items:
     90          description: typical number of pixels
     91      - minItems: 3
     92        maxItems: 3
     93        items:
     94          description: min, typ, max number of pixels
     95
     96  hsync-len:
     97    description: Horizontal sync length panel timing
     98    $ref: /schemas/types.yaml#/definitions/uint32-array
     99    oneOf:
    100      - maxItems: 1
    101        items:
    102          description: typical number of pixels
    103      - minItems: 3
    104        maxItems: 3
    105        items:
    106          description: min, typ, max number of pixels
    107
    108  vfront-porch:
    109    description: Vertical front porch panel timing
    110    $ref: /schemas/types.yaml#/definitions/uint32-array
    111    oneOf:
    112      - maxItems: 1
    113        items:
    114          description: typical number of lines
    115      - minItems: 3
    116        maxItems: 3
    117        items:
    118          description: min, typ, max number of lines
    119
    120  vback-porch:
    121    description: Vertical back porch panel timing
    122    $ref: /schemas/types.yaml#/definitions/uint32-array
    123    oneOf:
    124      - maxItems: 1
    125        items:
    126          description: typical number of lines
    127      - minItems: 3
    128        maxItems: 3
    129        items:
    130          description: min, typ, max number of lines
    131
    132  vsync-len:
    133    description: Vertical sync length panel timing
    134    $ref: /schemas/types.yaml#/definitions/uint32-array
    135    oneOf:
    136      - maxItems: 1
    137        items:
    138          description: typical number of lines
    139      - minItems: 3
    140        maxItems: 3
    141        items:
    142          description: min, typ, max number of lines
    143
    144  hsync-active:
    145    description: |
    146      Horizontal sync pulse.
    147      0 selects active low, 1 selects active high.
    148      If omitted then it is not used by the hardware
    149    $ref: /schemas/types.yaml#/definitions/uint32
    150    enum: [0, 1]
    151
    152  vsync-active:
    153    description: |
    154      Vertical sync pulse.
    155      0 selects active low, 1 selects active high.
    156      If omitted then it is not used by the hardware
    157    $ref: /schemas/types.yaml#/definitions/uint32
    158    enum: [0, 1]
    159
    160  de-active:
    161    description: |
    162      Data enable.
    163      0 selects active low, 1 selects active high.
    164      If omitted then it is not used by the hardware
    165    $ref: /schemas/types.yaml#/definitions/uint32
    166    enum: [0, 1]
    167
    168  pixelclk-active:
    169    description: |
    170      Data driving on rising or falling edge.
    171      Use 0 to drive pixel data on falling edge and
    172      sample data on rising edge.
    173      Use 1 to drive pixel data on rising edge and
    174      sample data on falling edge
    175    $ref: /schemas/types.yaml#/definitions/uint32
    176    enum: [0, 1]
    177
    178  syncclk-active:
    179    description: |
    180      Drive sync on rising or sample sync on falling edge.
    181      If not specified then the setup is as specified by pixelclk-active.
    182      Use 0 to drive sync on falling edge and
    183      sample sync on rising edge of pixel clock.
    184      Use 1 to drive sync on rising edge and
    185      sample sync on falling edge of pixel clock
    186    $ref: /schemas/types.yaml#/definitions/uint32
    187    enum: [0, 1]
    188
    189  interlaced:
    190    type: boolean
    191    description: Enable interlaced mode
    192
    193  doublescan:
    194    type: boolean
    195    description: Enable double scan mode
    196
    197  doubleclk:
    198    type: boolean
    199    description: Enable double clock mode
    200
    201required:
    202  - clock-frequency
    203  - hactive
    204  - vactive
    205  - hfront-porch
    206  - hback-porch
    207  - hsync-len
    208  - vfront-porch
    209  - vback-porch
    210  - vsync-len
    211
    212additionalProperties: false
    213
    214...