cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

samsung,ld9040.yaml (2415B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/panel/samsung,ld9040.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Samsung LD9040 AMOLED LCD parallel RGB panel with SPI control bus
      8
      9maintainers:
     10  - Andrzej Hajda <a.hajda@samsung.com>
     11
     12allOf:
     13  - $ref: panel-common.yaml#
     14  - $ref: /schemas/spi/spi-peripheral-props.yaml#
     15
     16properties:
     17  compatible:
     18    const: samsung,ld9040
     19
     20  display-timings: true
     21  port: true
     22  reg: true
     23  reset-gpios: true
     24
     25  vdd3-supply:
     26    description: core voltage supply
     27
     28  vci-supply:
     29    description: voltage supply for analog circuits
     30
     31  power-on-delay:
     32    $ref: /schemas/types.yaml#/definitions/uint32
     33    description: delay after turning regulators on [ms]
     34
     35  reset-delay:
     36    $ref: /schemas/types.yaml#/definitions/uint32
     37    description: delay after reset sequence [ms]
     38
     39  panel-width-mm:
     40    description: physical panel width [mm]
     41
     42  panel-height-mm:
     43    description: physical panel height [mm]
     44
     45required:
     46  - compatible
     47  - reg
     48  - vdd3-supply
     49  - vci-supply
     50  - reset-gpios
     51  - display-timings
     52
     53unevaluatedProperties: false
     54
     55examples:
     56  - |
     57    spi {
     58        #address-cells = <1>;
     59        #size-cells = <0>;
     60
     61        lcd@0 {
     62            compatible = "samsung,ld9040";
     63
     64            reg = <0>;
     65            vdd3-supply = <&ldo7_reg>;
     66            vci-supply = <&ldo17_reg>;
     67            reset-gpios = <&gpy4 5 0>;
     68            spi-max-frequency = <1200000>;
     69            spi-cpol;
     70            spi-cpha;
     71            power-on-delay = <10>;
     72            reset-delay = <10>;
     73            panel-width-mm = <90>;
     74            panel-height-mm = <154>;
     75
     76            display-timings {
     77                timing {
     78                    clock-frequency = <23492370>;
     79                    hactive = <480>;
     80                    vactive = <800>;
     81                    hback-porch = <16>;
     82                    hfront-porch = <16>;
     83                    vback-porch = <2>;
     84                    vfront-porch = <28>;
     85                    hsync-len = <2>;
     86                    vsync-len = <1>;
     87                    hsync-active = <0>;
     88                    vsync-active = <0>;
     89                    de-active = <0>;
     90                    pixelclk-active = <0>;
     91                };
     92            };
     93
     94            port {
     95                lcd_ep: endpoint {
     96                    remote-endpoint = <&fimd_dpi_ep>;
     97                };
     98            };
     99        };
    100    };
    101
    102...