cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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samsung,exynos5433-decon.yaml (4033B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-decon.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Samsung Exynos5433 SoC Display and Enhancement Controller (DECON)
      8
      9maintainers:
     10  - Inki Dae <inki.dae@samsung.com>
     11  - Joonyoung Shim <jy0922.shim@samsung.com>
     12  - Seung-Woo Kim <sw0312.kim@samsung.com>
     13  - Kyungmin Park <kyungmin.park@samsung.com>
     14  - Krzysztof Kozlowski <krzk@kernel.org>
     15
     16description: |
     17  DECON (Display and Enhancement Controller) is the Display Controller for the
     18  Exynos5433 series of SoCs which transfers the image data from a video memory
     19  buffer to an external LCD interface.
     20
     21properties:
     22  compatible:
     23    enum:
     24      - samsung,exynos5433-decon
     25      - samsung,exynos5433-decon-tv
     26
     27  clocks:
     28    minItems: 11
     29    maxItems: 11
     30
     31  clock-names:
     32    items:
     33      - const: pclk
     34      - const: aclk_decon
     35      - const: aclk_smmu_decon0x
     36      - const: aclk_xiu_decon0x
     37      - const: pclk_smmu_decon0x
     38      - const: aclk_smmu_decon1x
     39      - const: aclk_xiu_decon1x
     40      - const: pclk_smmu_decon1x
     41      - const: sclk_decon_vclk
     42      - const: sclk_decon_eclk
     43      - const: dsd
     44
     45  interrupts:
     46    minItems: 3
     47    maxItems: 4
     48    description: |
     49      Interrupts depend on mode of work:
     50       - video mode: vsync
     51       - command mode: lcd_sys
     52       - command mode with software trigger: lcd_sys, te
     53
     54  interrupt-names:
     55    minItems: 3
     56    items:
     57      - const: fifo
     58      - const: vsync
     59      - const: lcd_sys
     60      - const: te
     61
     62  iommus:
     63    minItems: 2
     64    maxItems: 2
     65
     66  iommu-names:
     67    items:
     68      - const: m0
     69      - const: m1
     70
     71  ports:
     72    $ref: /schemas/graph.yaml#/properties/ports
     73    description:
     74      Contains a port which is connected to mic node.
     75
     76  power-domains:
     77    maxItems: 1
     78
     79  reg:
     80    maxItems: 1
     81
     82  samsung,disp-sysreg:
     83    $ref: /schemas/types.yaml#/definitions/phandle
     84    description:
     85      Phandle to DISP system controller interface.
     86
     87required:
     88  - compatible
     89  - clocks
     90  - clock-names
     91  - interrupts
     92  - interrupt-names
     93  - ports
     94  - reg
     95
     96additionalProperties: false
     97
     98examples:
     99  - |
    100    #include <dt-bindings/clock/exynos5433.h>
    101    #include <dt-bindings/interrupt-controller/arm-gic.h>
    102
    103    display-controller@13800000 {
    104        compatible = "samsung,exynos5433-decon";
    105        reg = <0x13800000 0x2104>;
    106        clocks = <&cmu_disp CLK_PCLK_DECON>,
    107                 <&cmu_disp CLK_ACLK_DECON>,
    108                 <&cmu_disp CLK_ACLK_SMMU_DECON0X>,
    109                 <&cmu_disp CLK_ACLK_XIU_DECON0X>,
    110                 <&cmu_disp CLK_PCLK_SMMU_DECON0X>,
    111                 <&cmu_disp CLK_ACLK_SMMU_DECON1X>,
    112                 <&cmu_disp CLK_ACLK_XIU_DECON1X>,
    113                 <&cmu_disp CLK_PCLK_SMMU_DECON1X>,
    114                 <&cmu_disp CLK_SCLK_DECON_VCLK>,
    115                 <&cmu_disp CLK_SCLK_DECON_ECLK>,
    116                 <&cmu_disp CLK_SCLK_DSD>;
    117        clock-names = "pclk",
    118                      "aclk_decon",
    119                      "aclk_smmu_decon0x",
    120                      "aclk_xiu_decon0x",
    121                      "pclk_smmu_decon0x",
    122                      "aclk_smmu_decon1x",
    123                      "aclk_xiu_decon1x",
    124                      "pclk_smmu_decon1x",
    125                      "sclk_decon_vclk",
    126                      "sclk_decon_eclk",
    127                      "dsd";
    128        power-domains = <&pd_disp>;
    129        interrupt-names = "fifo", "vsync", "lcd_sys";
    130        interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
    131                     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
    132                     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
    133        samsung,disp-sysreg = <&syscon_disp>;
    134        iommus = <&sysmmu_decon0x>, <&sysmmu_decon1x>;
    135        iommu-names = "m0", "m1";
    136
    137        ports {
    138            #address-cells = <1>;
    139            #size-cells = <0>;
    140
    141            port@0 {
    142                reg = <0>;
    143                decon_to_mic: endpoint {
    144                    remote-endpoint = <&mic_to_decon>;
    145                };
    146            };
    147        };
    148    };