cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

st,stm32-ltdc.yaml (1780B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: STMicroelectronics STM32 lcd-tft display controller
      8
      9maintainers:
     10  - Philippe Cornu <philippe.cornu@foss.st.com>
     11  - Yannick Fertre <yannick.fertre@foss.st.com>
     12
     13properties:
     14  compatible:
     15    const: st,stm32-ltdc
     16
     17  reg:
     18    maxItems: 1
     19
     20  interrupts:
     21    items:
     22      - description: events interrupt line.
     23      - description: errors interrupt line.
     24    minItems: 1
     25
     26  clocks:
     27    maxItems: 1
     28
     29  clock-names:
     30    items:
     31      - const: lcd
     32
     33  resets:
     34    maxItems: 1
     35
     36  port:
     37    $ref: /schemas/graph.yaml#/properties/port
     38    description: |
     39      Video port for DPI RGB output.
     40      ltdc has one video port with up to 2 endpoints:
     41      - for external dpi rgb panel or bridge, using gpios.
     42      - for internal dpi input of the MIPI DSI host controller.
     43      Note: These 2 endpoints cannot be activated simultaneously.
     44
     45required:
     46  - compatible
     47  - reg
     48  - interrupts
     49  - clocks
     50  - clock-names
     51  - resets
     52  - port
     53
     54additionalProperties: false
     55
     56examples:
     57  - |
     58    #include <dt-bindings/interrupt-controller/arm-gic.h>
     59    #include <dt-bindings/clock/stm32mp1-clks.h>
     60    #include <dt-bindings/reset/stm32mp1-resets.h>
     61    ltdc: display-controller@40016800 {
     62        compatible = "st,stm32-ltdc";
     63        reg = <0x5a001000 0x400>;
     64        interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
     65                     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
     66        clocks = <&rcc LTDC_PX>;
     67        clock-names = "lcd";
     68        resets = <&rcc LTDC_R>;
     69
     70        port {
     71             ltdc_out_dsi: endpoint {
     72                     remote-endpoint = <&dsi_in>;
     73             };
     74        };
     75    };
     76
     77...