cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ste,mcde.yaml (3908B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/display/ste,mcde.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: ST-Ericsson Multi Channel Display Engine MCDE
      8
      9maintainers:
     10  - Linus Walleij <linus.walleij@linaro.org>
     11
     12properties:
     13  compatible:
     14    const: ste,mcde
     15
     16  reg:
     17    maxItems: 1
     18
     19  interrupts:
     20    maxItems: 1
     21
     22  clocks:
     23    description: an array of the MCDE clocks
     24    items:
     25      - description: MCDECLK (main MCDE clock)
     26      - description: LCDCLK (LCD clock)
     27      - description: PLLDSI (HDMI clock)
     28
     29  clock-names:
     30    items:
     31      - const: mcde
     32      - const: lcd
     33      - const: hdmi
     34
     35  resets:
     36    maxItems: 1
     37
     38  epod-supply:
     39    description: a phandle to the EPOD regulator
     40
     41  vana-supply:
     42    description: a phandle to the analog voltage regulator
     43
     44  port:
     45    $ref: /schemas/graph.yaml#/properties/port
     46    description:
     47      A DPI port node
     48
     49  "#address-cells":
     50    const: 1
     51
     52  "#size-cells":
     53    const: 1
     54
     55  ranges: true
     56
     57patternProperties:
     58  "^dsi@[0-9a-f]+$":
     59    description: subnodes for the three DSI host adapters
     60    type: object
     61    $ref: dsi-controller.yaml#
     62
     63    properties:
     64      compatible:
     65        const: ste,mcde-dsi
     66
     67      reg:
     68        maxItems: 1
     69
     70      vana-supply:
     71        description: a phandle to the analog voltage regulator
     72
     73      clocks:
     74        description: phandles to the high speed and low power (energy save) clocks
     75          the high speed clock is not present on the third (dsi2) block, so it
     76          should only have the "lp" clock
     77        minItems: 1
     78        maxItems: 2
     79
     80      clock-names:
     81        oneOf:
     82          - items:
     83              - const: hs
     84              - const: lp
     85          - items:
     86              - const: lp
     87
     88    required:
     89      - compatible
     90      - reg
     91      - vana-supply
     92      - clocks
     93      - clock-names
     94
     95    unevaluatedProperties: false
     96
     97required:
     98  - compatible
     99  - reg
    100  - interrupts
    101  - clocks
    102  - clock-names
    103  - epod-supply
    104  - vana-supply
    105
    106additionalProperties: false
    107
    108examples:
    109  - |
    110    #include <dt-bindings/interrupt-controller/irq.h>
    111    #include <dt-bindings/interrupt-controller/arm-gic.h>
    112    #include <dt-bindings/mfd/dbx500-prcmu.h>
    113    #include <dt-bindings/gpio/gpio.h>
    114
    115    mcde@a0350000 {
    116      compatible = "ste,mcde";
    117      reg = <0xa0350000 0x1000>;
    118      interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
    119      epod-supply = <&db8500_b2r2_mcde_reg>;
    120      vana-supply = <&ab8500_ldo_ana_reg>;
    121      clocks = <&prcmu_clk PRCMU_MCDECLK>,
    122               <&prcmu_clk PRCMU_LCDCLK>,
    123               <&prcmu_clk PRCMU_PLLDSI>;
    124      clock-names = "mcde", "lcd", "hdmi";
    125      #address-cells = <1>;
    126      #size-cells = <1>;
    127      ranges;
    128
    129      dsi0: dsi@a0351000 {
    130        compatible = "ste,mcde-dsi";
    131        reg = <0xa0351000 0x1000>;
    132        vana-supply = <&ab8500_ldo_ana_reg>;
    133        clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
    134        clock-names = "hs", "lp";
    135        #address-cells = <1>;
    136        #size-cells = <0>;
    137
    138        panel@0 {
    139          compatible = "samsung,s6d16d0";
    140          reg = <0>;
    141          vdd1-supply = <&ab8500_ldo_aux1_reg>;
    142          reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
    143        };
    144      };
    145
    146      dsi1: dsi@a0352000 {
    147        compatible = "ste,mcde-dsi";
    148        reg = <0xa0352000 0x1000>;
    149        vana-supply = <&ab8500_ldo_ana_reg>;
    150        clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
    151        clock-names = "hs", "lp";
    152        #address-cells = <1>;
    153        #size-cells = <0>;
    154      };
    155
    156      dsi2: dsi@a0353000 {
    157        compatible = "ste,mcde-dsi";
    158        reg = <0xa0353000 0x1000>;
    159        vana-supply = <&ab8500_ldo_ana_reg>;
    160        /* This DSI port only has the Low Power / Energy Save clock */
    161        clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
    162        clock-names = "lp";
    163        #address-cells = <1>;
    164        #size-cells = <0>;
    165      };
    166    };
    167
    168...