cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nvidia,tegra114-mipi.txt (1002B)


      1NVIDIA Tegra MIPI pad calibration controller
      2
      3Required properties:
      4- compatible: "nvidia,tegra<chip>-mipi"
      5- reg: Physical base address and length of the controller's registers.
      6- clocks: Must contain an entry for each entry in clock-names.
      7  See ../clocks/clock-bindings.txt for details.
      8- clock-names: Must include the following entries:
      9  - mipi-cal
     10- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads
     11  that need to be calibrated for a given device.
     12
     13User nodes need to contain an nvidia,mipi-calibrate property that has a
     14phandle to refer to the calibration controller node and a bitmask of the pads
     15that need to be calibrated.
     16
     17Example:
     18
     19	mipi: mipi@700e3000 {
     20		compatible = "nvidia,tegra114-mipi";
     21		reg = <0x700e3000 0x100>;
     22		clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;
     23		clock-names = "mipi-cal";
     24		#nvidia,mipi-calibrate-cells = <1>;
     25	};
     26
     27	...
     28
     29	host1x@50000000 {
     30		...
     31
     32		dsi@54300000 {
     33			...
     34
     35			nvidia,mipi-calibrate = <&mipi 0x060>;
     36
     37			...
     38		};
     39
     40		...
     41	};