cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl-imx-dma.txt (1422B)

      1* Freescale Direct Memory Access (DMA) Controller for i.MX
      2
      3This document will only describe differences to the generic DMA Controller and
      4DMA request bindings as described in dma/dma.txt .
      5
      6* DMA controller
      7
      8Required properties:
      9- compatible : Should be "fsl,<chip>-dma". chip can be imx1, imx21 or imx27
     10- reg : Should contain DMA registers location and length
     11- interrupts : First item should be DMA interrupt, second one is optional and
     12    should contain DMA Error interrupt
     13- #dma-cells : Has to be 1. imx-dma does not support anything else.
     14
     15Optional properties:
     16- dma-channels : Number of DMA channels supported. Should be 16.
     17- #dma-channels : deprecated
     18- dma-requests : Number of DMA requests supported.
     19- #dma-requests : deprecated
     20
     21Example:
     22
     23	dma: dma@10001000 {
     24		compatible = "fsl,imx27-dma";
     25		reg = <0x10001000 0x1000>;
     26		interrupts = <32 33>;
     27		#dma-cells = <1>;
     28		dma-channels = <16>;
     29	};
     30
     31
     32* DMA client
     33
     34Clients have to specify the DMA requests with phandles in a list.
     35
     36Required properties:
     37- dmas: List of one or more DMA request specifiers. One DMA request specifier
     38    consists of a phandle to the DMA controller followed by the integer
     39    specifying the request line.
     40- dma-names: List of string identifiers for the DMA requests. For the correct
     41    names, have a look at the specific client driver.
     42
     43Example:
     44
     45	sdhci1: sdhci@10013000 {
     46		...
     47		dmas = <&dma 7>;
     48		dma-names = "rx-tx";
     49		...
     50	};