cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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milbeaut-m10v-xdmac.txt (727B)

      1* Milbeaut AXI DMA Controller
      2
      3Milbeaut AXI DMA controller has only memory to memory transfer capability.
      4
      5* DMA controller
      6
      7Required property:
      8- compatible: 	Should be  "socionext,milbeaut-m10v-xdmac"
      9- reg:		Should contain DMA registers location and length.
     10- interrupts: 	Should contain all of the per-channel DMA interrupts.
     11                Number of channels is configurable - 2, 4 or 8, so
     12                the number of interrupts specified should be {2,4,8}.
     13- #dma-cells: 	Should be 1.
     14
     15Example:
     16	xdmac0: dma-controller@1c250000 {
     17		compatible = "socionext,milbeaut-m10v-xdmac";
     18		reg = <0x1c250000 0x1000>;
     19		interrupts = <0 17 0x4>,
     20			     <0 18 0x4>,
     21			     <0 19 0x4>,
     22			     <0 20 0x4>;
     23		#dma-cells = <1>;
     24	};