cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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renesas,usb-dmac.yaml (2617B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/dma/renesas,usb-dmac.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Renesas USB DMA Controller
      8
      9maintainers:
     10  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
     11
     12allOf:
     13  - $ref: "dma-controller.yaml#"
     14
     15properties:
     16  compatible:
     17    items:
     18      - enum:
     19          - renesas,r8a7742-usb-dmac  # RZ/G1H
     20          - renesas,r8a7743-usb-dmac  # RZ/G1M
     21          - renesas,r8a7744-usb-dmac  # RZ/G1N
     22          - renesas,r8a7745-usb-dmac  # RZ/G1E
     23          - renesas,r8a77470-usb-dmac # RZ/G1C
     24          - renesas,r8a774a1-usb-dmac # RZ/G2M
     25          - renesas,r8a774b1-usb-dmac # RZ/G2N
     26          - renesas,r8a774c0-usb-dmac # RZ/G2E
     27          - renesas,r8a774e1-usb-dmac # RZ/G2H
     28          - renesas,r8a7790-usb-dmac  # R-Car H2
     29          - renesas,r8a7791-usb-dmac  # R-Car M2-W
     30          - renesas,r8a7793-usb-dmac  # R-Car M2-N
     31          - renesas,r8a7794-usb-dmac  # R-Car E2
     32          - renesas,r8a7795-usb-dmac  # R-Car H3
     33          - renesas,r8a7796-usb-dmac  # R-Car M3-W
     34          - renesas,r8a77961-usb-dmac # R-Car M3-W+
     35          - renesas,r8a77965-usb-dmac # R-Car M3-N
     36          - renesas,r8a77990-usb-dmac # R-Car E3
     37          - renesas,r8a77995-usb-dmac # R-Car D3
     38      - const: renesas,usb-dmac
     39
     40  reg:
     41    maxItems: 1
     42
     43  interrupts:
     44    minItems: 2
     45    maxItems: 2
     46
     47  interrupt-names:
     48    items:
     49      - pattern: ch0
     50      - pattern: ch1
     51
     52  clocks:
     53    maxItems: 1
     54
     55  '#dma-cells':
     56    const: 1
     57    description:
     58      The cell specifies the channel number of the DMAC port connected to
     59      the DMA client.
     60
     61  dma-channels:
     62    const: 2
     63
     64  iommus:
     65    minItems: 2
     66    maxItems: 2
     67
     68  power-domains:
     69    maxItems: 1
     70
     71  resets:
     72    maxItems: 1
     73
     74required:
     75  - compatible
     76  - reg
     77  - interrupts
     78  - interrupt-names
     79  - clocks
     80  - '#dma-cells'
     81  - dma-channels
     82  - power-domains
     83  - resets
     84
     85additionalProperties: false
     86
     87examples:
     88  - |
     89    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
     90    #include <dt-bindings/interrupt-controller/arm-gic.h>
     91    #include <dt-bindings/power/r8a7790-sysc.h>
     92
     93    usb_dmac0: dma-controller@e65a0000 {
     94        compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
     95        reg = <0xe65a0000 0x100>;
     96        interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
     97                     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
     98        interrupt-names = "ch0", "ch1";
     99        clocks = <&cpg CPG_MOD 330>;
    100        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
    101        resets = <&cpg 330>;
    102        #dma-cells = <1>;
    103        dma-channels = <2>;
    104    };