cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sifive,fu540-c000-pdma.yaml (1780B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: SiFive Unleashed Rev C000 Platform DMA
      8
      9maintainers:
     10  - Green Wan <green.wan@sifive.com>
     11  - Palmer Debbelt <palmer@sifive.com>
     12  - Paul Walmsley <paul.walmsley@sifive.com>
     13
     14description: |
     15  Platform DMA is a DMA engine of SiFive Unleashed. It supports 4
     16  channels. Each channel has 2 interrupts. One is for DMA done and
     17  the other is for DME error.
     18
     19  In different SoC, DMA could be attached to different IRQ line.
     20  DT file need to be changed to meet the difference. For technical
     21  doc,
     22
     23  https://static.dev.sifive.com/FU540-C000-v1.0.pdf
     24
     25allOf:
     26  - $ref: "dma-controller.yaml#"
     27
     28properties:
     29  compatible:
     30    items:
     31      - enum:
     32          - sifive,fu540-c000-pdma
     33      - const: sifive,pdma0
     34    description:
     35      Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
     36      Supported compatible strings are -
     37      "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
     38      SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
     39      with no chip integration tweaks.
     40
     41  reg:
     42    maxItems: 1
     43
     44  interrupts:
     45    minItems: 1
     46    maxItems: 8
     47
     48  dma-channels:
     49    description: For backwards-compatibility, the default value is 4
     50    minimum: 1
     51    maximum: 4
     52    default: 4
     53
     54  '#dma-cells':
     55    const: 1
     56
     57required:
     58  - compatible
     59  - reg
     60  - interrupts
     61
     62unevaluatedProperties: false
     63
     64examples:
     65  - |
     66    dma-controller@3000000 {
     67      compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
     68      reg = <0x3000000 0x8000>;
     69      dma-channels = <4>;
     70      interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>, <30>;
     71      #dma-cells = <1>;
     72    };
     73
     74...