cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sprd-dma.txt (1307B)


      1* Spreadtrum DMA controller
      2
      3This binding follows the generic DMA bindings defined in dma.txt.
      4
      5Required properties:
      6- compatible: Should be "sprd,sc9860-dma".
      7- reg: Should contain DMA registers location and length.
      8- interrupts: Should contain one interrupt shared by all channel.
      9- #dma-cells: must be <1>. Used to represent the number of integer
     10	cells in the dmas property of client device.
     11- dma-channels : Number of DMA channels supported. Should be 32.
     12- clock-names: Should contain the clock of the DMA controller.
     13- clocks: Should contain a clock specifier for each entry in clock-names.
     14
     15Deprecated properties:
     16- #dma-channels : Number of DMA channels supported. Should be 32.
     17
     18Example:
     19
     20Controller:
     21apdma: dma-controller@20100000 {
     22	compatible = "sprd,sc9860-dma";
     23	reg = <0x20100000 0x4000>;
     24	interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
     25	#dma-cells = <1>;
     26	dma-channels = <32>;
     27	clock-names = "enable";
     28	clocks = <&clk_ap_ahb_gates 5>;
     29};
     30
     31
     32Client:
     33DMA clients connected to the Spreadtrum DMA controller must use the format
     34described in the dma.txt file, using a two-cell specifier for each channel.
     35The two cells in order are:
     361. A phandle pointing to the DMA controller.
     372. The slave id.
     38
     39spi0: spi@70a00000{
     40	...
     41	dma-names = "rx_chn", "tx_chn";
     42	dmas = <&apdma 11>, <&apdma 12>;
     43	...
     44};