cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

st,stm32-dmamux.yaml (1034B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/dma/st,stm32-dmamux.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings
      8
      9maintainers:
     10  - Amelie Delaunay <amelie.delaunay@foss.st.com>
     11
     12allOf:
     13  - $ref: "dma-router.yaml#"
     14
     15properties:
     16  "#dma-cells":
     17    const: 3
     18
     19  compatible:
     20    const: st,stm32h7-dmamux
     21
     22  reg:
     23    maxItems: 1
     24
     25  clocks:
     26    maxItems: 1
     27
     28  resets:
     29    maxItems: 1
     30
     31required:
     32  - compatible
     33  - reg
     34  - dma-masters
     35
     36unevaluatedProperties: false
     37
     38examples:
     39  - |
     40    #include <dt-bindings/interrupt-controller/arm-gic.h>
     41    #include <dt-bindings/clock/stm32mp1-clks.h>
     42    #include <dt-bindings/reset/stm32mp1-resets.h>
     43    dma-router@40020800 {
     44      compatible = "st,stm32h7-dmamux";
     45      reg = <0x40020800 0x3c>;
     46      #dma-cells = <3>;
     47      dma-requests = <128>;
     48      dma-channels = <16>;
     49      dma-masters = <&dma1>, <&dma2>;
     50      clocks = <&timer_clk>;
     51    };
     52
     53...