cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti-dma-crossbar.txt (2389B)

      1Texas Instruments DMA Crossbar (DMA request router)
      2
      3Required properties:
      4- compatible:	"ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
      5		"ti,am335x-edma-crossbar" for AM335x and AM437x
      6- reg:		Memory map for accessing module
      7- #dma-cells:	Should be set to to match with the DMA controller's dma-cells
      8		for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
      9- dma-requests:	Number of DMA requests the crossbar can receive
     10- dma-masters:	phandle pointing to the DMA controller
     11
     12The DMA controller node need to have the following poroperties:
     13- dma-requests:	Number of DMA requests the controller can handle
     14
     15Optional properties:
     16- ti,dma-safe-map: Safe routing value for unused request lines
     17- ti,reserved-dma-request-ranges: DMA request ranges which should not be used
     18		when mapping xbar input to DMA request, they are either
     19		allocated to be used by for example the DSP or they are used as
     20		memcpy channels in eDMA.
     21
     22Notes:
     23When requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request
     24the DMA event number as crossbar ID (input to the DMA crossbar).
     25
     26For ti,am335x-edma-crossbar: the meaning of parameters of dmas for clients:
     27dmas = <&edma_xbar 12 0 1>; where <12> is the DMA request number, <0> is the TC
     28the event should be assigned and <1> is the mux selection for in the crossbar.
     29When mux 0 is used the DMA channel can be requested directly from edma node.
     30
     31Example:
     32
     33/* DMA controller */
     34sdma: dma-controller@4a056000 {
     35	compatible = "ti,omap4430-sdma";
     36	reg = <0x4a056000 0x1000>;
     37	interrupts =	<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
     38			<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
     39			<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
     40			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
     41	#dma-cells = <1>;
     42	dma-channels = <32>;
     43	dma-requests = <127>;
     44};
     45
     46/* DMA crossbar */
     47sdma_xbar: dma-router@4a002b78 {
     48	compatible = "ti,dra7-dma-crossbar";
     49	reg = <0x4a002b78 0xfc>;
     50	#dma-cells = <1>;
     51	dma-requests = <205>;
     52	ti,dma-safe-map = <0>;
     53	/* Protect the sDMA request ranges: 10-14 and 100-126 */
     54	ti,reserved-dma-request-ranges = <10 5>, <100 27>;
     55	dma-masters = <&sdma>;
     56};
     57
     58/* DMA client */
     59uart1: serial@4806a000 {
     60	compatible = "ti,omap4-uart";
     61	reg = <0x4806a000 0x100>;
     62	interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
     63	ti,hwmods = "uart1";
     64	clock-frequency = <48000000>;
     65	/* Requesting crossbar input 49 and 50 */
     66	dmas = <&sdma_xbar 49>, <&sdma_xbar 50>;
     67	dma-names = "tx", "rx";
     68};