k3-bcdma.yaml (5082B)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2020 Texas Instruments Incorporated 3# Author: Peter Ujfalusi <peter.ujfalusi@ti.com> 4%YAML 1.2 5--- 6$id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml# 7$schema: http://devicetree.org/meta-schemas/core.yaml# 8 9title: Texas Instruments K3 DMSS BCDMA Device Tree Bindings 10 11maintainers: 12 - Peter Ujfalusi <peter.ujfalusi@gmail.com> 13 14description: | 15 The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR 16 mode channels of K3 UDMA-P. 17 BCDMA includes block copy channels and Split channels. 18 19 Block copy channels mainly used for memory to memory transfers, but with 20 optional triggers a block copy channel can service peripherals by accessing 21 directly to memory mapped registers or area. 22 23 Split channels can be used to service PSI-L based peripherals. 24 The peripherals can be PSI-L native or legacy, non PSI-L native peripherals 25 with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the 26 legacy peripheral. 27 28 PDMAs can be configured via BCDMA split channel's peer registers to match with 29 the configuration of the legacy peripheral. 30 31allOf: 32 - $ref: /schemas/dma/dma-controller.yaml# 33 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 34 35properties: 36 compatible: 37 const: ti,am64-dmss-bcdma 38 39 "#dma-cells": 40 const: 3 41 description: | 42 cell 1: type of the BCDMA channel to be used to service the peripheral: 43 0 - split channel 44 1 - block copy channel using global trigger 1 45 2 - block copy channel using global trigger 2 46 3 - block copy channel using local trigger 47 48 cell 2: parameter for the channel: 49 if cell 1 is 0 (split channel): 50 PSI-L thread ID of the remote (to BCDMA) end. 51 Valid ranges for thread ID depends on the data movement direction: 52 for source thread IDs (rx): 0 - 0x7fff 53 for destination thread IDs (tx): 0x8000 - 0xffff 54 55 Please refer to the device documentation for the PSI-L thread map and 56 also the PSI-L peripheral chapter for the correct thread ID. 57 if cell 1 is 1 or 2 (block copy channel using global trigger): 58 Unused, ignored 59 60 The trigger must be configured for the channel externally to BCDMA, 61 channels using global triggers should not be requested directly, but 62 via DMA event router. 63 if cell 1 is 3 (block copy channel using local trigger): 64 bchan number of the locally triggered channel 65 66 cell 3: ASEL value for the channel 67 68 reg: 69 maxItems: 5 70 71 reg-names: 72 items: 73 - const: gcfg 74 - const: bchanrt 75 - const: rchanrt 76 - const: tchanrt 77 - const: ringrt 78 79 msi-parent: true 80 81 ti,asel: 82 $ref: /schemas/types.yaml#/definitions/uint32 83 description: ASEL value for non slave channels 84 85 ti,sci-rm-range-bchan: 86 $ref: /schemas/types.yaml#/definitions/uint32-array 87 description: | 88 Array of BCDMA block-copy channel resource subtypes for resource 89 allocation for this host 90 minItems: 1 91 # Should be enough 92 maxItems: 255 93 items: 94 maximum: 0x3f 95 96 ti,sci-rm-range-tchan: 97 $ref: /schemas/types.yaml#/definitions/uint32-array 98 description: | 99 Array of BCDMA split tx channel resource subtypes for resource allocation 100 for this host 101 minItems: 1 102 # Should be enough 103 maxItems: 255 104 items: 105 maximum: 0x3f 106 107 ti,sci-rm-range-rchan: 108 $ref: /schemas/types.yaml#/definitions/uint32-array 109 description: | 110 Array of BCDMA split rx channel resource subtypes for resource allocation 111 for this host 112 minItems: 1 113 # Should be enough 114 maxItems: 255 115 items: 116 maximum: 0x3f 117 118required: 119 - compatible 120 - "#dma-cells" 121 - reg 122 - reg-names 123 - msi-parent 124 - ti,sci 125 - ti,sci-dev-id 126 - ti,sci-rm-range-bchan 127 - ti,sci-rm-range-tchan 128 - ti,sci-rm-range-rchan 129 130unevaluatedProperties: false 131 132examples: 133 - |+ 134 cbass_main { 135 #address-cells = <2>; 136 #size-cells = <2>; 137 138 main_dmss { 139 compatible = "simple-mfd"; 140 #address-cells = <2>; 141 #size-cells = <2>; 142 dma-ranges; 143 ranges; 144 145 ti,sci-dev-id = <25>; 146 147 main_bcdma: dma-controller@485c0100 { 148 compatible = "ti,am64-dmss-bcdma"; 149 150 reg = <0x0 0x485c0100 0x0 0x100>, 151 <0x0 0x4c000000 0x0 0x20000>, 152 <0x0 0x4a820000 0x0 0x20000>, 153 <0x0 0x4aa40000 0x0 0x20000>, 154 <0x0 0x4bc00000 0x0 0x100000>; 155 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; 156 msi-parent = <&inta_main_dmss>; 157 #dma-cells = <3>; 158 159 ti,sci = <&dmsc>; 160 ti,sci-dev-id = <26>; 161 162 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */ 163 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */ 164 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */ 165 }; 166 }; 167 };