cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dmc-520.yaml (1256B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/edac/dmc-520.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: ARM DMC-520 EDAC bindings
      8
      9maintainers:
     10  - Lei Wang <lewan@microsoft.com>
     11
     12description: |+
     13  DMC-520 node is defined to describe DRAM error detection and correction.
     14
     15  https://static.docs.arm.com/100000/0200/corelink_dmc520_trm_100000_0200_01_en.pdf
     16
     17properties:
     18  compatible:
     19    items:
     20      - const: brcm,dmc-520
     21      - const: arm,dmc-520
     22
     23  reg:
     24    maxItems: 1
     25
     26  interrupts:
     27    minItems: 1
     28    maxItems: 10
     29
     30  interrupt-names:
     31    minItems: 1
     32    maxItems: 10
     33    items:
     34      enum:
     35        - ram_ecc_errc
     36        - ram_ecc_errd
     37        - dram_ecc_errc
     38        - dram_ecc_errd
     39        - failed_access
     40        - failed_prog
     41        - link_err
     42        - temperature_event
     43        - arch_fsm
     44        - phy_request
     45
     46required:
     47  - compatible
     48  - reg
     49  - interrupts
     50  - interrupt-names
     51
     52additionalProperties: false
     53
     54examples:
     55  - |
     56    dmc0: dmc@200000 {
     57        compatible = "brcm,dmc-520", "arm,dmc-520";
     58        reg = <0x200000 0x80000>;
     59        interrupts = <0x0 0x349 0x4>, <0x0 0x34B 0x4>;
     60        interrupt-names = "dram_ecc_errc", "dram_ecc_errd";
     61    };