cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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coreboot.txt (1255B)


      1COREBOOT firmware information
      2
      3The device tree node to communicate the location of coreboot's memory-resident
      4bookkeeping structures to the kernel. Since coreboot itself cannot boot a
      5device-tree-based kernel (yet), this node needs to be inserted by a
      6second-stage bootloader (a coreboot "payload").
      7
      8Required properties:
      9 - compatible: Should be "coreboot"
     10 - reg: Address and length of the following two memory regions, in order:
     11	1.) The coreboot table. This is a list of variable-sized descriptors
     12	that contain various compile- and run-time generated firmware
     13	parameters. It is identified by the magic string "LBIO" in its first
     14	four bytes.
     15	See coreboot's src/commonlib/include/commonlib/coreboot_tables.h for
     16	details.
     17	2.) The CBMEM area. This is a downward-growing memory region used by
     18	coreboot to dynamically allocate data structures that remain resident.
     19	It may or may not include the coreboot table as one of its members. It
     20	is identified by a root node descriptor with the magic number
     21	0xc0389481 that resides in the topmost 8 bytes of the area.
     22	See coreboot's src/include/imd.h for details.
     23
     24Example:
     25	firmware {
     26		ranges;
     27
     28		coreboot {
     29			compatible = "coreboot";
     30			reg = <0xfdfea000 0x264>,
     31			      <0xfdfea000 0x16000>;
     32		}
     33	};