nvidia,tegra20-fuse.yaml (1794B)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/fuse/nvidia,tegra20-fuse.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra FUSE block 8 9maintainers: 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 13properties: 14 compatible: 15 oneOf: 16 - enum: 17 - nvidia,tegra20-efuse 18 - nvidia,tegra30-efuse 19 - nvidia,tegra114-efuse 20 - nvidia,tegra124-efuse 21 - nvidia,tegra210-efuse 22 - nvidia,tegra186-efuse 23 - nvidia,tegra194-efuse 24 - nvidia,tegra234-efuse 25 26 - items: 27 - const: nvidia,tegra132-efuse 28 - const: nvidia,tegra124-efuse 29 30 reg: 31 maxItems: 1 32 33 clocks: 34 maxItems: 1 35 36 clock-names: 37 items: 38 - const: fuse 39 40 resets: 41 maxItems: 1 42 43 reset-names: 44 items: 45 - const: fuse 46 47 operating-points-v2: 48 $ref: "/schemas/types.yaml#/definitions/phandle" 49 50 power-domains: 51 items: 52 - description: phandle to the core power domain 53 54additionalProperties: false 55 56required: 57 - compatible 58 - reg 59 - clocks 60 - clock-names 61 62if: 63 properties: 64 compatible: 65 contains: 66 enum: 67 - nvidia,tegra20-efuse 68 - nvidia,tegra30-efuse 69 - nvidia,tegra114-efuse 70 - nvidia,tegra124-efuse 71 - nvidia,tegra132-efuse 72 - nvidia,tegra210-efuse 73then: 74 required: 75 - resets 76 - reset-names 77 78examples: 79 - | 80 #include <dt-bindings/clock/tegra20-car.h> 81 82 fuse@7000f800 { 83 compatible = "nvidia,tegra20-efuse"; 84 reg = <0x7000f800 0x400>; 85 clocks = <&tegra_car TEGRA20_CLK_FUSE>; 86 clock-names = "fuse"; 87 resets = <&tegra_car 39>; 88 reset-names = "fuse"; 89 };