cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gpio-altera.txt (1644B)


      1Altera GPIO controller bindings
      2
      3Required properties:
      4- compatible:
      5  - "altr,pio-1.0"
      6- reg: Physical base address and length of the controller's registers.
      7- #gpio-cells : Should be 2
      8  - The first cell is the gpio offset number.
      9  - The second cell is reserved and is currently unused.
     10- gpio-controller : Marks the device node as a GPIO controller.
     11- interrupt-controller: Mark the device node as an interrupt controller
     12- #interrupt-cells : Should be 2. The interrupt type is fixed in the hardware.
     13  - The first cell is the GPIO offset number within the GPIO controller.
     14  - The second cell is the interrupt trigger type and level flags.
     15- interrupts: Specify the interrupt.
     16- altr,interrupt-type: Specifies the interrupt trigger type the GPIO
     17  hardware is synthesized. This field is required if the Altera GPIO controller
     18  used has IRQ enabled as the interrupt type is not software controlled,
     19  but hardware synthesized. Required if GPIO is used as an interrupt
     20  controller. The value is defined in <dt-bindings/interrupt-controller/irq.h>
     21  Only the following flags are supported:
     22    IRQ_TYPE_EDGE_RISING
     23    IRQ_TYPE_EDGE_FALLING
     24    IRQ_TYPE_EDGE_BOTH
     25    IRQ_TYPE_LEVEL_HIGH
     26
     27Optional properties:
     28- altr,ngpio: Width of the GPIO bank. This defines how many pins the
     29  GPIO device has. Ranges between 1-32. Optional and defaults to 32 if not
     30  specified.
     31
     32Example:
     33
     34gpio_altr: gpio@ff200000 {
     35	compatible = "altr,pio-1.0";
     36	reg = <0xff200000 0x10>;
     37	interrupts = <0 45 4>;
     38	altr,ngpio = <32>;
     39	altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
     40	#gpio-cells = <2>;
     41	gpio-controller;
     42	#interrupt-cells = <2>;
     43	interrupt-controller;
     44};