cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gpio-ath79.txt (1164B)

      1Binding for Qualcomm Atheros AR7xxx/AR9xxx GPIO controller
      2
      3Required properties:
      4- compatible: has to be "qca,<soctype>-gpio" and one of the following
      5  fallbacks:
      6  - "qca,ar7100-gpio"
      7  - "qca,ar9340-gpio"
      8- reg: Base address and size of the controllers memory area
      9- gpio-controller : Marks the device node as a GPIO controller.
     10- #gpio-cells : Should be two. The first cell is the pin number and the
     11  second cell is used to specify optional parameters.
     12- ngpios: Should be set to the number of GPIOs available on the SoC.
     13
     14Optional properties:
     15- interrupts: Interrupt specifier for the controllers interrupt.
     16- interrupt-controller : Identifies the node as an interrupt controller
     17- #interrupt-cells : Specifies the number of cells needed to encode interrupt
     18		     source, should be 2
     19
     20Please refer to interrupts.txt in this directory for details of the common
     21Interrupt Controllers bindings used by client devices.
     22
     23Example:
     24
     25	gpio@18040000 {
     26		compatible = "qca,ar9132-gpio", "qca,ar7100-gpio";
     27		reg = <0x18040000 0x30>;
     28		interrupts = <2>;
     29
     30		ngpios = <22>;
     31
     32		gpio-controller;
     33		#gpio-cells = <2>;
     34
     35		interrupt-controller;
     36		#interrupt-cells = <2>;
     37	};