cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

gpio-mxs.yaml (3194B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/gpio/gpio-mxs.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale MXS GPIO controller
      8
      9maintainers:
     10  - Shawn Guo <shawnguo@kernel.org>
     11  - Anson Huang <Anson.Huang@nxp.com>
     12
     13description: |
     14  The Freescale MXS GPIO controller is part of MXS PIN controller.
     15  The GPIOs are organized in port/bank, each port consists of 32 GPIOs.
     16  As the GPIO controller is embedded in the PIN controller and all the
     17  GPIO ports share the same IO space with PIN controller, the GPIO node
     18  will be represented as sub-nodes of MXS pinctrl node.
     19
     20properties:
     21  compatible:
     22    enum:
     23      - fsl,imx23-pinctrl
     24      - fsl,imx28-pinctrl
     25
     26  '#address-cells':
     27    const: 1
     28  '#size-cells':
     29    const: 0
     30
     31  reg:
     32    maxItems: 1
     33
     34patternProperties:
     35  "gpio@[0-9]+$":
     36    type: object
     37    properties:
     38      compatible:
     39        enum:
     40          - fsl,imx23-gpio
     41          - fsl,imx28-gpio
     42
     43      reg:
     44        maxItems: 1
     45
     46      interrupts:
     47        description: Should be the port interrupt shared by all 32 pins.
     48        maxItems: 1
     49
     50      interrupt-controller: true
     51
     52      "#interrupt-cells":
     53        const: 2
     54
     55      "#gpio-cells":
     56        const: 2
     57
     58      gpio-controller: true
     59
     60    required:
     61      - compatible
     62      - reg
     63      - interrupts
     64      - interrupt-controller
     65      - "#interrupt-cells"
     66      - "#gpio-cells"
     67      - gpio-controller
     68
     69    additionalProperties: false
     70
     71required:
     72  - compatible
     73  - reg
     74  - '#address-cells'
     75  - '#size-cells'
     76
     77additionalProperties: false
     78
     79examples:
     80  - |
     81    pinctrl@80018000 {
     82        #address-cells = <1>;
     83        #size-cells = <0>;
     84        compatible = "fsl,imx28-pinctrl";
     85        reg = <0x80018000 0x2000>;
     86
     87        gpio@0 {
     88                compatible = "fsl,imx28-gpio";
     89                reg = <0>;
     90                interrupts = <127>;
     91                gpio-controller;
     92                #gpio-cells = <2>;
     93                interrupt-controller;
     94                #interrupt-cells = <2>;
     95        };
     96
     97        gpio@1 {
     98                compatible = "fsl,imx28-gpio";
     99                reg = <1>;
    100                interrupts = <126>;
    101                gpio-controller;
    102                #gpio-cells = <2>;
    103                interrupt-controller;
    104                #interrupt-cells = <2>;
    105        };
    106
    107        gpio@2 {
    108                compatible = "fsl,imx28-gpio";
    109                reg = <2>;
    110                interrupts = <125>;
    111                gpio-controller;
    112                #gpio-cells = <2>;
    113                interrupt-controller;
    114                #interrupt-cells = <2>;
    115        };
    116
    117        gpio@3 {
    118                compatible = "fsl,imx28-gpio";
    119                reg = <3>;
    120                interrupts = <124>;
    121                gpio-controller;
    122                #gpio-cells = <2>;
    123                interrupt-controller;
    124                #interrupt-cells = <2>;
    125        };
    126
    127        gpio@4 {
    128                compatible = "fsl,imx28-gpio";
    129                reg = <4>;
    130                interrupts = <123>;
    131                gpio-controller;
    132                #gpio-cells = <2>;
    133                interrupt-controller;
    134                #interrupt-cells = <2>;
    135        };
    136    };