cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

gpio-sprd.txt (1084B)


      1Spreadtrum GPIO controller bindings
      2
      3The controller's registers are organized as sets of sixteen 16-bit
      4registers with each set controlling a bank of up to 16 pins. A single
      5interrupt is shared for all of the banks handled by the controller.
      6
      7Required properties:
      8- compatible: Should be "sprd,sc9860-gpio".
      9- reg: Define the base and range of the I/O address space containing
     10the GPIO controller registers.
     11- gpio-controller: Marks the device node as a GPIO controller.
     12- #gpio-cells: Should be <2>. The first cell is the gpio number and
     13the second cell is used to specify optional parameters.
     14- interrupt-controller: Marks the device node as an interrupt controller.
     15- #interrupt-cells: Should be <2>. Specifies the number of cells needed
     16to encode interrupt source.
     17- interrupts: Should be the port interrupt shared by all the gpios.
     18
     19Example:
     20	ap_gpio: gpio@40280000 {
     21		compatible = "sprd,sc9860-gpio";
     22		reg = <0 0x40280000 0 0x1000>;
     23		gpio-controller;
     24		#gpio-cells = <2>;
     25		interrupt-controller;
     26		#interrupt-cells = <2>;
     27		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
     28	};