cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gpio-xilinx.txt (1782B)

      1Xilinx plb/axi GPIO controller
      2
      3Dual channel GPIO controller with configurable number of pins
      4(from 1 to 32 per channel). Every pin can be configured as
      5input/output/tristate. Both channels share the same global IRQ but
      6local interrupts can be enabled on channel basis.
      7
      8Required properties:
      9- compatible : Should be "xlnx,xps-gpio-1.00.a"
     10- reg : Address and length of the register set for the device
     11- #gpio-cells : Should be two. The first cell is the pin number and the
     12  second cell is used to specify optional parameters (currently unused).
     13- gpio-controller : Marks the device node as a GPIO controller.
     14
     15Optional properties:
     16- clocks : Input clock specifier. Refer to common clock bindings.
     17- interrupts : Interrupt mapping for GPIO IRQ.
     18- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
     19- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
     20- xlnx,gpio-width : gpio width
     21- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
     22- xlnx,is-dual : if 1, controller also uses the second channel
     23- xlnx,all-inputs-2 : as above but for the second channel
     24- xlnx,dout-default-2 : as above but the second channel
     25- xlnx,gpio2-width : as above but for the second channel
     26- xlnx,tri-default-2 : as above but for the second channel
     27
     28
     29Example:
     30gpio: gpio@40000000 {
     31	#gpio-cells = <2>;
     32	compatible = "xlnx,xps-gpio-1.00.a";
     33	clocks = <&clkc25>;
     34	gpio-controller ;
     35	interrupt-parent = <&microblaze_0_intc>;
     36	interrupts = < 6 2 >;
     37	reg = < 0x40000000 0x10000 >;
     38	xlnx,all-inputs = <0x0>;
     39	xlnx,all-inputs-2 = <0x0>;
     40	xlnx,dout-default = <0x0>;
     41	xlnx,dout-default-2 = <0x0>;
     42	xlnx,gpio-width = <0x2>;
     43	xlnx,gpio2-width = <0x2>;
     44	xlnx,interrupt-present = <0x1>;
     45	xlnx,is-dual = <0x1>;
     46	xlnx,tri-default = <0xffffffff>;
     47	xlnx,tri-default-2 = <0xffffffff>;
     48} ;