cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ibm,ppc4xx-gpio.txt (799B)


      1* IBM/AMCC/APM GPIO Controller for PowerPC 4XX series and compatible SoCs
      2
      3All GPIOs are pin-shared with other functions. DCRs control whether a
      4particular pin that has GPIO capabilities acts as a GPIO or is used for
      5another purpose. GPIO outputs are separately programmable to emulate
      6an open-drain driver.
      7
      8Required properties:
      9	- compatible: must be "ibm,ppc4xx-gpio"
     10	- reg: address and length of the register set for the device
     11	- #gpio-cells: must be set to 2. The first cell is the pin number
     12		and the second cell is used to specify the gpio polarity:
     13		0 = active high
     14		1 = active low
     15	- gpio-controller: marks the device node as a gpio controller.
     16
     17Example:
     18
     19GPIO0: gpio@ef600b00 {
     20	compatible = "ibm,ppc4xx-gpio";
     21	reg = <0xef600b00 0x00000048>;
     22	#gpio-cells = <2>;
     23	gpio-controller;
     24};