cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel,ixp4xx-gpio.txt (1161B)


      1Intel IXP4xx XScale Networking Processors GPIO
      2
      3This GPIO controller is found in the Intel IXP4xx processors.
      4It supports 16 GPIO lines.
      5
      6The interrupt portions of the GPIO controller is hierarchical:
      7the synchronous edge detector is part of the GPIO block, but the
      8actual enabling/disabling of the interrupt line is done in the
      9main IXP4xx interrupt controller which has a 1:1 mapping for
     10the first 12 GPIO lines to 12 system interrupts.
     11
     12The remaining 4 GPIO lines can not be used for receiving
     13interrupts.
     14
     15The interrupt parent of this GPIO controller must be the
     16IXP4xx interrupt controller.
     17
     18Required properties:
     19
     20- compatible : Should be
     21  "intel,ixp4xx-gpio"
     22- reg : Should contain registers location and length
     23- gpio-controller : marks this as a GPIO controller
     24- #gpio-cells : Should be 2, see gpio/gpio.txt
     25- interrupt-controller : marks this as an interrupt controller
     26- #interrupt-cells : a standard two-cell interrupt, see
     27  interrupt-controller/interrupts.txt
     28
     29Example:
     30
     31gpio0: gpio@c8004000 {
     32	compatible = "intel,ixp4xx-gpio";
     33	reg = <0xc8004000 0x1000>;
     34	gpio-controller;
     35	#gpio-cells = <2>;
     36	interrupt-controller;
     37	#interrupt-cells = <2>;
     38};