cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ni,169445-nand-gpio.txt (1158B)


      1Bindings for the National Instruments 169445 GPIO NAND controller
      2
      3The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
      4for input (the ready signal) and one for output (control signals).  It is
      5intended to be used with the GPIO NAND driver.
      6
      7Required properties:
      8	- compatible: should be "ni,169445-nand-gpio"
      9	- reg-names: must contain
     10		"dat" - data register
     11	- reg: address + size pairs describing the GPIO register sets;
     12		order must correspond with the order of entries in reg-names
     13	- #gpio-cells: must be set to 2. The first cell is the pin number and
     14			the second cell is used to specify the gpio polarity:
     15			0 = active high
     16			1 = active low
     17	- gpio-controller: Marks the device node as a gpio controller.
     18
     19Optional properties:
     20	- no-output: disables driving output on the pins
     21
     22Examples:
     23	gpio1: nand-gpio-out@1f300010 {
     24		compatible = "ni,169445-nand-gpio";
     25		reg = <0x1f300010 0x4>;
     26		reg-names = "dat";
     27		gpio-controller;
     28		#gpio-cells = <2>;
     29	};
     30
     31	gpio2: nand-gpio-in@1f300014 {
     32		compatible = "ni,169445-nand-gpio";
     33		reg = <0x1f300014 0x4>;
     34		reg-names = "dat";
     35		gpio-controller;
     36		#gpio-cells = <2>;
     37		no-output;
     38	};