cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sifive,gpio.yaml (1823B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: SiFive GPIO controller
      8
      9maintainers:
     10  - Paul Walmsley <paul.walmsley@sifive.com>
     11
     12properties:
     13  compatible:
     14    items:
     15      - enum:
     16          - sifive,fu540-c000-gpio
     17          - sifive,fu740-c000-gpio
     18          - canaan,k210-gpiohs
     19      - const: sifive,gpio0
     20
     21  reg:
     22    maxItems: 1
     23
     24  interrupts:
     25    description:
     26      Interrupt mapping, one per GPIO. Maximum 32 GPIOs.
     27    minItems: 1
     28    maxItems: 32
     29
     30  interrupt-controller: true
     31
     32  "#interrupt-cells":
     33    const: 2
     34
     35  clocks:
     36    maxItems: 1
     37
     38  "#gpio-cells":
     39    const: 2
     40
     41  ngpios:
     42    description:
     43      The number of GPIOs available on the controller implementation.
     44      It is 16 for the SiFive SoCs and 32 for the Canaan K210.
     45    minimum: 1
     46    maximum: 32
     47    default: 16
     48
     49  gpio-controller: true
     50
     51required:
     52  - compatible
     53  - reg
     54  - interrupts
     55  - interrupt-controller
     56  - "#interrupt-cells"
     57  - "#gpio-cells"
     58  - gpio-controller
     59
     60if:
     61  properties:
     62    compatible:
     63      contains:
     64        enum:
     65          - sifive,fu540-c000-gpio
     66          - sifive,fu740-c000-gpio
     67then:
     68  required:
     69    - clocks
     70
     71additionalProperties: false
     72
     73examples:
     74  - |
     75      #include <dt-bindings/clock/sifive-fu540-prci.h>
     76      gpio@10060000 {
     77        compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
     78        interrupt-parent = <&plic>;
     79        interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>,
     80                     <17>, <18>, <19>, <20>, <21>, <22>;
     81        reg = <0x10060000 0x1000>;
     82        clocks = <&tlclk FU540_PRCI_CLK_TLCLK>;
     83        gpio-controller;
     84        #gpio-cells = <2>;
     85        interrupt-controller;
     86        #interrupt-cells = <2>;
     87      };
     88
     89...