cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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wd,mbl-gpio.txt (1100B)


      1Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
      2
      3The Western Digital MyBook Live has two memory-mapped GPIO controllers.
      4Both GPIO controller only have a single 8-bit data register, where GPIO
      5state can be read and/or written.
      6
      7Required properties:
      8	- compatible: should be "wd,mbl-gpio"
      9	- reg-names: must contain
     10		"dat" - data register
     11	- reg: address + size pairs describing the GPIO register sets;
     12		order must correspond with the order of entries in reg-names
     13	- #gpio-cells: must be set to 2. The first cell is the pin number and
     14			the second cell is used to specify the gpio polarity:
     15			0 = active high
     16			1 = active low
     17	- gpio-controller: Marks the device node as a gpio controller.
     18
     19Optional properties:
     20	- no-output: GPIOs are read-only.
     21
     22Examples:
     23	gpio0: gpio0@e0000000 {
     24		compatible = "wd,mbl-gpio";
     25		reg-names = "dat";
     26		reg = <0xe0000000 0x1>;
     27		#gpio-cells = <2>;
     28		gpio-controller;
     29	};
     30
     31	gpio1: gpio1@e0100000 {
     32		compatible = "wd,mbl-gpio";
     33		reg-names = "dat";
     34		reg = <0xe0100000 0x1>;
     35		#gpio-cells = <2>;
     36		gpio-controller;
     37		no-output;
     38	};