cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti,omap-hwspinlock.yaml (1168B)

      1# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: TI HwSpinlock for OMAP and K3 based SoCs
      8
      9maintainers:
     10  - Suman Anna <s-anna@ti.com>
     11
     12properties:
     13  compatible:
     14    enum:
     15      - ti,omap4-hwspinlock  # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
     16      - ti,am64-hwspinlock   # for K3 AM64x SoCs
     17      - ti,am654-hwspinlock  # for K3 AM65x, J721E and J7200 SoCs
     18
     19  reg:
     20    maxItems: 1
     21
     22  "#hwlock-cells":
     23    const: 1
     24    description: |
     25      The OMAP hwspinlock users will use a 0-indexed relative hwlock number as
     26      the argument specifier value for requesting a specific hwspinlock within
     27      a hwspinlock bank.
     28
     29      Please look at the generic hwlock binding for usage information for
     30      consumers, "Documentation/devicetree/bindings/hwlock/hwlock.txt"
     31
     32required:
     33  - compatible
     34  - reg
     35  - "#hwlock-cells"
     36
     37additionalProperties: false
     38
     39examples:
     40
     41  - |
     42    spinlock@4a0f6000 {
     43        compatible = "ti,omap4-hwspinlock";
     44        reg = <0x4a0f6000 0x1000>;
     45        #hwlock-cells = <1>;
     46    };