cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aspeed,i2c.yaml (1597B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings
      8
      9maintainers:
     10  - Rayn Chen <rayn_chen@aspeedtech.com>
     11
     12allOf:
     13  - $ref: /schemas/i2c/i2c-controller.yaml#
     14
     15properties:
     16  compatible:
     17    enum:
     18      - aspeed,ast2400-i2c-bus
     19      - aspeed,ast2500-i2c-bus
     20      - aspeed,ast2600-i2c-bus
     21
     22  reg:
     23    minItems: 1
     24    items:
     25      - description: address offset and range of bus
     26      - description: address offset and range of bus buffer
     27
     28  interrupts:
     29    maxItems: 1
     30
     31  clocks:
     32    maxItems: 1
     33    description:
     34      root clock of bus, should reference the APB
     35      clock in the second cell
     36
     37  resets:
     38    maxItems: 1
     39
     40  bus-frequency:
     41    minimum: 500
     42    maximum: 4000000
     43    default: 100000
     44    description: frequency of the bus clock in Hz defaults to 100 kHz when not
     45      specified
     46
     47  multi-master:
     48    type: boolean
     49    description:
     50      states that there is another master active on this bus
     51
     52required:
     53  - reg
     54  - compatible
     55  - clocks
     56  - resets
     57
     58unevaluatedProperties: false
     59
     60examples:
     61  - |
     62    #include <dt-bindings/clock/aspeed-clock.h>
     63    i2c0: i2c-bus@40 {
     64      #address-cells = <1>;
     65      #size-cells = <0>;
     66      compatible = "aspeed,ast2500-i2c-bus";
     67      reg = <0x40 0x40>;
     68      clocks = <&syscon ASPEED_CLK_APB>;
     69      resets = <&syscon ASPEED_RESET_I2C>;
     70      bus-frequency = <100000>;
     71      interrupts = <0>;
     72      interrupt-parent = <&i2c_ic>;
     73    };