cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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brcm,iproc-i2c.yaml (1628B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Broadcom iProc I2C controller
      8
      9maintainers:
     10  - Rafał Miłecki <rafal@milecki.pl>
     11
     12properties:
     13  compatible:
     14    enum:
     15      - brcm,iproc-i2c
     16      - brcm,iproc-nic-i2c
     17
     18  reg:
     19    maxItems: 1
     20
     21  clock-frequency:
     22    enum: [ 100000, 400000 ]
     23
     24  interrupts:
     25    description: |
     26      Should contain the I2C interrupt. For certain revisions of the I2C
     27      controller, I2C interrupt is unwired to the interrupt controller. In such
     28      case, this property should be left unspecified, and driver will fall back
     29      to polling mode
     30    maxItems: 1
     31
     32  brcm,ape-hsls-addr-mask:
     33    $ref: /schemas/types.yaml#/definitions/uint32
     34    description: Host view of address mask into the 'APE' co-processor
     35
     36allOf:
     37  - $ref: /schemas/i2c/i2c-controller.yaml#
     38  - if:
     39      properties:
     40        compatible:
     41          contains:
     42            const: brcm,iproc-nic-i2c
     43    then:
     44      required:
     45        - brcm,ape-hsls-addr-mask
     46
     47unevaluatedProperties: false
     48
     49required:
     50  - reg
     51  - clock-frequency
     52  - '#address-cells'
     53  - '#size-cells'
     54
     55examples:
     56  - |
     57    #include <dt-bindings/interrupt-controller/arm-gic.h>
     58
     59    i2c@18008000 {
     60        compatible = "brcm,iproc-i2c";
     61        reg = <0x18008000 0x100>;
     62        #address-cells = <1>;
     63        #size-cells = <0>;
     64        interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
     65        clock-frequency = <100000>;
     66
     67        wm8750@1a {
     68            compatible = "wlf,wm8750";
     69            reg = <0x1a>;
     70        };
     71    };