cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cdns,i2c-r1p10.yaml (1230B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: "http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#"
      5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      6
      7title: Cadence I2C controller Device Tree Bindings
      8
      9maintainers:
     10  - Michal Simek <michal.simek@xilinx.com>
     11
     12allOf:
     13  - $ref: /schemas/i2c/i2c-controller.yaml#
     14
     15properties:
     16  compatible:
     17    enum:
     18      - cdns,i2c-r1p10 # cadence i2c controller version 1.0
     19      - cdns,i2c-r1p14 # cadence i2c controller version 1.4
     20
     21  reg:
     22    maxItems: 1
     23
     24  clocks:
     25    minItems: 1
     26
     27  interrupts:
     28    maxItems: 1
     29
     30  clock-frequency:
     31    minimum: 1
     32    maximum: 400000
     33    description: |
     34      Desired operating frequency, in Hz, of the bus.
     35
     36  clock-name:
     37    const: pclk
     38    description: |
     39      Input clock name.
     40
     41required:
     42  - compatible
     43  - reg
     44  - clocks
     45  - interrupts
     46
     47unevaluatedProperties: false
     48
     49examples:
     50  - |
     51    #include <dt-bindings/interrupt-controller/arm-gic.h>
     52    i2c@e0004000 {
     53        compatible = "cdns,i2c-r1p10";
     54        clocks = <&clkc 38>;
     55        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
     56        reg = <0xe0004000 0x1000>;
     57        clock-frequency = <400000>;
     58        #address-cells = <1>;
     59        #size-cells = <0>;
     60    };