cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c-mpc.yaml (2448B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
      8
      9maintainers:
     10  - Chris Packham <chris.packham@alliedtelesis.co.nz>
     11
     12allOf:
     13  - $ref: /schemas/i2c/i2c-controller.yaml#
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - items:
     19          - enum:
     20              - mpc5200-i2c
     21              - fsl,mpc5200-i2c
     22              - fsl,mpc5121-i2c
     23              - fsl,mpc8313-i2c
     24              - fsl,mpc8543-i2c
     25              - fsl,mpc8544-i2c
     26          - const: fsl-i2c
     27      - items:
     28          - const: fsl,mpc5200b-i2c
     29          - const: fsl,mpc5200-i2c
     30          - const: fsl-i2c
     31
     32  reg:
     33    maxItems: 1
     34
     35  interrupts:
     36    maxItems: 1
     37
     38  fsl,preserve-clocking:
     39    $ref: /schemas/types.yaml#/definitions/flag
     40    description: |
     41      if defined, the clock settings from the bootloader are
     42      preserved (not touched)
     43
     44  fsl,timeout:
     45    $ref: /schemas/types.yaml#/definitions/uint32
     46    description: |
     47      I2C bus timeout in microseconds
     48
     49  fsl,i2c-erratum-a004447:
     50    $ref: /schemas/types.yaml#/definitions/flag
     51    description: |
     52      Indicates the presence of QorIQ erratum A-004447, which
     53      says that the standard i2c recovery scheme mechanism does
     54      not work and an alternate implementation is needed.
     55
     56required:
     57  - compatible
     58  - reg
     59  - interrupts
     60
     61unevaluatedProperties: false
     62
     63examples:
     64  - |
     65    /* MPC5121 based board */
     66    i2c@1740 {
     67        #address-cells = <1>;
     68        #size-cells = <0>;
     69        compatible = "fsl,mpc5121-i2c", "fsl-i2c";
     70        reg = <0x1740 0x20>;
     71        interrupts = <11 0x8>;
     72        interrupt-parent = <&ipic>;
     73        clock-frequency = <100000>;
     74    };
     75
     76  - |
     77    /* MPC5200B based board */
     78    i2c@3d00 {
     79        #address-cells = <1>;
     80        #size-cells = <0>;
     81        compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c";
     82        reg = <0x3d00 0x40>;
     83        interrupts = <2 15 0>;
     84        interrupt-parent = <&mpc5200_pic>;
     85        fsl,preserve-clocking;
     86    };
     87
     88  - |
     89    /* MPC8544 base board */
     90    i2c@3100 {
     91        #address-cells = <1>;
     92        #size-cells = <0>;
     93        compatible = "fsl,mpc8544-i2c", "fsl-i2c";
     94        reg = <0x3100 0x100>;
     95        interrupts = <43 2>;
     96        interrupt-parent = <&mpic>;
     97        clock-frequency = <400000>;
     98        fsl,timeout = <10000>;
     99    };
    100...