i2c-mt65xx.yaml (2835B)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek I2C controller 8 9description: 10 This driver interfaces with the native I2C controller present in 11 various MediaTek SoCs. 12 13allOf: 14 - $ref: /schemas/i2c/i2c-controller.yaml# 15 16maintainers: 17 - Qii Wang <qii.wang@mediatek.com> 18 19properties: 20 compatible: 21 oneOf: 22 - const: mediatek,mt2712-i2c 23 - const: mediatek,mt6577-i2c 24 - const: mediatek,mt6589-i2c 25 - const: mediatek,mt7622-i2c 26 - const: mediatek,mt8168-i2c 27 - const: mediatek,mt8173-i2c 28 - const: mediatek,mt8183-i2c 29 - const: mediatek,mt8186-i2c 30 - const: mediatek,mt8192-i2c 31 - items: 32 - enum: 33 - mediatek,mt7629-i2c 34 - mediatek,mt8516-i2c 35 - const: mediatek,mt2712-i2c 36 - items: 37 - enum: 38 - mediatek,mt2701-i2c 39 - mediatek,mt6797-i2c 40 - mediatek,mt7623-i2c 41 - const: mediatek,mt6577-i2c 42 - items: 43 - enum: 44 - mediatek,mt8195-i2c 45 - const: mediatek,mt8192-i2c 46 47 reg: 48 items: 49 - description: Physical base address 50 - description: DMA base address 51 52 interrupts: 53 maxItems: 1 54 55 clocks: 56 minItems: 2 57 items: 58 - description: Main clock for I2C bus 59 - description: Clock for I2C via DMA 60 - description: Bus arbitrator clock 61 - description: Clock for I2C from PMIC 62 63 clock-names: 64 minItems: 2 65 items: 66 - const: main 67 - const: dma 68 - const: arb 69 - const: pmic 70 71 clock-div: 72 $ref: /schemas/types.yaml#/definitions/uint32 73 description: Frequency divider of clock source in I2C module 74 75 clock-frequency: 76 default: 100000 77 description: 78 SCL frequency to use (in Hz). If omitted, 100kHz is used. 79 80 mediatek,have-pmic: 81 description: Platform controls I2C from PMIC side 82 type: boolean 83 84 mediatek,use-push-pull: 85 description: Use push-pull mode I/O config 86 type: boolean 87 88 vbus-supply: 89 description: Phandle to the regulator providing power to SCL/SDA 90 91required: 92 - compatible 93 - reg 94 - clocks 95 - clock-names 96 - clock-div 97 - interrupts 98 99unevaluatedProperties: false 100 101examples: 102 - | 103 #include <dt-bindings/interrupt-controller/arm-gic.h> 104 #include <dt-bindings/interrupt-controller/irq.h> 105 106 i2c0: i2c@1100d000 { 107 compatible = "mediatek,mt6577-i2c"; 108 reg = <0x1100d000 0x70>, <0x11000300 0x80>; 109 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>; 110 clocks = <&i2c0_ck>, <&ap_dma_ck>; 111 clock-names = "main", "dma"; 112 clock-div = <16>; 113 clock-frequency = <400000>; 114 mediatek,have-pmic; 115 116 #address-cells = <1>; 117 #size-cells = <0>; 118 };