cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c-mux-reg.txt (2462B)


      1Register-based I2C Bus Mux
      2
      3This binding describes an I2C bus multiplexer that uses a single register
      4to route the I2C signals.
      5
      6Required properties:
      7- compatible: i2c-mux-reg
      8- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
      9  port is connected to.
     10* Standard I2C mux properties. See i2c-mux.yaml in this directory.
     11* I2C child bus nodes. See i2c-mux.yaml in this directory.
     12
     13Optional properties:
     14- reg: this pair of <offset size> specifies the register to control the mux.
     15  The <offset size> depends on its parent node. It can be any memory-mapped
     16  address. The size must be either 1, 2, or 4 bytes. If reg is omitted, the
     17  resource of this device will be used.
     18- little-endian: The existence indicates the register is in little endian.
     19- big-endian: The existence indicates the register is in big endian.
     20  If both little-endian and big-endian are omitted, the endianness of the
     21  CPU will be used.
     22- write-only: The existence indicates the register is write-only.
     23- idle-state: value to set the muxer to when idle. When no value is
     24  given, it defaults to the last value used.
     25
     26Whenever an access is made to a device on a child bus, the value set
     27in the relevant node's reg property will be output to the register.
     28
     29If an idle state is defined, using the idle-state (optional) property,
     30whenever an access is not being made to a device on a child bus, the
     31register will be set according to the idle value.
     32
     33If an idle state is not defined, the most recently used value will be
     34left programmed into the register.
     35
     36Example of a mux on PCIe card, the host is a powerpc SoC (big endian):
     37
     38	i2c-mux {
     39		/* the <offset size> depends on the address translation
     40		 * of the parent device. If omitted, device resource
     41		 * will be used instead. The size is to determine
     42		 * whether iowrite32, iowrite16, or iowrite8 will be used.
     43		 */
     44		reg = <0x6028 0x4>;
     45		little-endian;		/* little endian register on PCIe */
     46		compatible = "i2c-mux-reg";
     47		#address-cells = <1>;
     48		#size-cells = <0>;
     49		i2c-parent = <&i2c1>;
     50		i2c@0 {
     51			reg = <0>;
     52			#address-cells = <1>;
     53			#size-cells = <0>;
     54
     55			si5338: clock-generator@70 {
     56				compatible = "silabs,si5338";
     57				reg = <0x70>;
     58				/* other stuff */
     59			};
     60		};
     61
     62		i2c@1 {
     63			/* data is written using iowrite32 */
     64			reg = <1>;
     65			#address-cells = <1>;
     66			#size-cells = <0>;
     67
     68			si5338: clock-generator@70 {
     69				compatible = "silabs,si5338";
     70				reg = <0x70>;
     71				/* other stuff */
     72			};
     73		};
     74	};