cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom,i2c-geni-qcom.yaml (2123B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: "http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml#"
      5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      6
      7title: Qualcomm Geni based QUP I2C Controller
      8
      9maintainers:
     10  - Andy Gross <agross@kernel.org>
     11  - Bjorn Andersson <bjorn.andersson@linaro.org>
     12
     13allOf:
     14  - $ref: /schemas/i2c/i2c-controller.yaml#
     15
     16properties:
     17  compatible:
     18    const: qcom,geni-i2c
     19
     20  clocks:
     21    maxItems: 1
     22
     23  clock-names:
     24    const: se
     25
     26  clock-frequency:
     27    default: 100000
     28
     29  dmas:
     30    maxItems: 2
     31
     32  dma-names:
     33    items:
     34      - const: tx
     35      - const: rx
     36
     37  interconnects:
     38    maxItems: 3
     39
     40  interconnect-names:
     41    items:
     42      - const: qup-core
     43      - const: qup-config
     44      - const: qup-memory
     45
     46  interrupts:
     47    maxItems: 1
     48
     49  pinctrl-0: true
     50  pinctrl-1: true
     51
     52  pinctrl-names:
     53    minItems: 1
     54    items:
     55      - const: default
     56      - const: sleep
     57
     58  power-domains:
     59    maxItems: 1
     60
     61  reg:
     62    maxItems: 1
     63
     64  required-opps:
     65    maxItems: 1
     66
     67required:
     68  - compatible
     69  - interrupts
     70  - clocks
     71  - clock-names
     72  - reg
     73
     74unevaluatedProperties: false
     75
     76examples:
     77  - |
     78    #include <dt-bindings/interrupt-controller/arm-gic.h>
     79    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
     80    #include <dt-bindings/interconnect/qcom,sc7180.h>
     81    #include <dt-bindings/power/qcom-rpmpd.h>
     82
     83    i2c@88000 {
     84        compatible = "qcom,geni-i2c";
     85        reg = <0x00880000 0x4000>;
     86        clock-names = "se";
     87        clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
     88        pinctrl-names = "default";
     89        pinctrl-0 = <&qup_i2c0_default>;
     90        interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
     91        #address-cells = <1>;
     92        #size-cells = <0>;
     93        interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
     94                        <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
     95                        <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
     96        interconnect-names = "qup-core", "qup-config", "qup-memory";
     97        power-domains = <&rpmhpd SC7180_CX>;
     98        required-opps = <&rpmhpd_opp_low_svs>;
     99    };
    100...