cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,mma8452.yaml (1238B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/iio/accel/fsl,mma8452.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title:
      8  Freescale MMA8451Q, MMA8452Q, MMA8453Q, MMA8652FC, MMA8653FC or FXLS8471Q
      9  triaxial accelerometer
     10
     11maintainers:
     12  - Martin Kepplinger <martin.kepplinger@theobroma-systems.com>
     13
     14properties:
     15  compatible:
     16    enum:
     17      - fsl,mma8451
     18      - fsl,mma8452
     19      - fsl,mma8453
     20      - fsl,mma8652
     21      - fsl,mma8653
     22      - fsl,fxls8471
     23
     24  reg:
     25    maxItems: 1
     26
     27  interrupts:
     28    description:
     29      2 highly configurable interrupt lines exist.
     30    minItems: 1
     31    maxItems: 2
     32
     33  interrupt-names:
     34    description: Specify which interrupt line is in use.
     35    items:
     36      enum:
     37        - INT1
     38        - INT2
     39    minItems: 1
     40    maxItems: 2
     41
     42  vdd-supply: true
     43  vddio-supply: true
     44
     45required:
     46  - compatible
     47  - reg
     48
     49additionalProperties: false
     50
     51examples:
     52  - |
     53    i2c {
     54        #address-cells = <1>;
     55        #size-cells = <0>;
     56
     57        accel@1d {
     58            compatible = "fsl,mma8453";
     59            reg = <0x1d>;
     60            interrupt-parent = <&gpio1>;
     61            interrupts = <5 0>;
     62            interrupt-names = "INT2";
     63        };
     64    };
     65...