cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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amlogic,meson-saradc.yaml (3732B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Amlogic Meson SAR (Successive Approximation Register) A/D converter
      8
      9maintainers:
     10  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
     11
     12description:
     13  Binding covers a range of ADCs found on Amlogic Meson SoCs.
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - const: amlogic,meson-saradc
     19      - items:
     20          - enum:
     21              - amlogic,meson8-saradc
     22              - amlogic,meson8b-saradc
     23              - amlogic,meson8m2-saradc
     24              - amlogic,meson-gxbb-saradc
     25              - amlogic,meson-gxl-saradc
     26              - amlogic,meson-gxm-saradc
     27              - amlogic,meson-axg-saradc
     28              - amlogic,meson-g12a-saradc
     29          - const: amlogic,meson-saradc
     30
     31  reg:
     32    maxItems: 1
     33
     34  interrupts:
     35    description: Interrupt indicates end of sampling.
     36    maxItems: 1
     37
     38  clocks:
     39    minItems: 2
     40    maxItems: 4
     41
     42  clock-names:
     43    minItems: 2
     44    items:
     45      - const: clkin
     46      - const: core
     47      - const: adc_clk
     48      - const: adc_sel
     49
     50  vref-supply: true
     51
     52  "#io-channel-cells":
     53    const: 1
     54
     55  amlogic,hhi-sysctrl:
     56    $ref: /schemas/types.yaml#/definitions/phandle
     57    description:
     58      Syscon which contains the 5th bit of the TSC (temperature sensor
     59      coefficient) on Meson8b and Meson8m2 (which used to calibrate the
     60      temperature sensor)
     61
     62  nvmem-cells:
     63    description: phandle to the temperature_calib eFuse cells
     64    maxItems: 1
     65
     66  nvmem-cell-names:
     67    const: temperature_calib
     68
     69allOf:
     70  - if:
     71      properties:
     72        compatible:
     73          contains:
     74            enum:
     75              - amlogic,meson8-saradc
     76              - amlogic,meson8b-saradc
     77              - amlogic,meson8m2-saradc
     78    then:
     79      properties:
     80        clocks:
     81          maxItems: 2
     82        clock-names:
     83          maxItems: 2
     84    else:
     85      properties:
     86        nvmem-cells: false
     87        mvmem-cel-names: false
     88        clocks:
     89          minItems: 4
     90        clock-names:
     91          minItems: 4
     92
     93  - if:
     94      properties:
     95        compatible:
     96          contains:
     97            enum:
     98              - amlogic,meson8b-saradc
     99              - amlogic,meson8m2-saradc
    100    then:
    101      properties:
    102        amlogic,hhi-sysctrl: true
    103    else:
    104      properties:
    105        amlogic,hhi-sysctrl: false
    106
    107required:
    108  - compatible
    109  - reg
    110  - interrupts
    111  - clocks
    112  - clock-names
    113  - "#io-channel-cells"
    114
    115additionalProperties: false
    116
    117examples:
    118  - |
    119    #include <dt-bindings/interrupt-controller/irq.h>
    120    #include <dt-bindings/clock/gxbb-clkc.h>
    121    #include <dt-bindings/interrupt-controller/arm-gic.h>
    122    soc {
    123        #address-cells = <2>;
    124        #size-cells = <2>;
    125        adc@8680 {
    126            compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
    127            #io-channel-cells = <1>;
    128            reg = <0x0 0x8680 0x0 0x34>;
    129            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
    130            clocks = <&xtal>,
    131                <&clkc CLKID_SAR_ADC>,
    132                <&clkc CLKID_SAR_ADC_CLK>,
    133                <&clkc CLKID_SAR_ADC_SEL>;
    134            clock-names = "clkin", "core", "adc_clk", "adc_sel";
    135        };
    136        adc@9680 {
    137            compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
    138            #io-channel-cells = <1>;
    139            reg = <0x0 0x9680 0x0 0x34>;
    140            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
    141            clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
    142            clock-names = "clkin", "core";
    143            nvmem-cells = <&tsens_caldata>;
    144            nvmem-cell-names = "temperature_calib";
    145            amlogic,hhi-sysctrl = <&hhi>;
    146        };
    147    };
    148...