cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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microchip,mcp3911.yaml (1783B)

      1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
      2# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
      3%YAML 1.2
      4---
      5$id: "http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#"
      6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      7
      8title: Microchip MCP3911 Dual channel analog front end (ADC)
      9
     10maintainers:
     11  - Marcus Folkesson <marcus.folkesson@gmail.com>
     12  - Kent Gustavsson <nedo80@gmail.com>
     13
     14description: |
     15  Bindings for the Microchip MCP3911 Dual channel ADC device. Datasheet can be
     16  found here: https://ww1.microchip.com/downloads/en/DeviceDoc/20002286C.pdf
     17
     18properties:
     19  compatible:
     20    enum:
     21      - microchip,mcp3911
     22
     23  reg:
     24    maxItems: 1
     25
     26  spi-max-frequency:
     27    maximum: 20000000
     28
     29  clocks:
     30    description: |
     31      Phandle and clock identifier for external sampling clock.
     32      If not specified, the internal crystal oscillator will be used.
     33    maxItems: 1
     34
     35  interrupts:
     36    description: IRQ line of the ADC
     37    maxItems: 1
     38
     39  microchip,device-addr:
     40    description: Device address when multiple MCP3911 chips are present on the same SPI bus.
     41    $ref: /schemas/types.yaml#/definitions/uint32
     42    enum: [0, 1, 2, 3]
     43    default: 0
     44
     45  vref-supply:
     46    description: |
     47      Phandle to the external reference voltage supply.
     48      If not specified, the internal voltage reference (1.2V) will be used.
     49
     50required:
     51  - compatible
     52  - reg
     53
     54additionalProperties: false
     55
     56examples:
     57  - |
     58    spi {
     59      #address-cells = <1>;
     60      #size-cells = <0>;
     61
     62      adc@0 {
     63        compatible = "microchip,mcp3911";
     64        reg = <0>;
     65        interrupt-parent = <&gpio5>;
     66        interrupts = <15 2>;
     67        spi-max-frequency = <20000000>;
     68        microchip,device-addr = <0>;
     69        vref-supply = <&vref_reg>;
     70        clocks = <&xtal>;
     71      };
     72    };