cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nuvoton,npcm750-adc.yaml (1519B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Nuvoton NPCM BMC Analog to Digital Converter (ADC)
      8
      9maintainers:
     10  - Tomer Maimon <tmaimon77@gmail.com>
     11
     12description:
     13  The NPCM ADC is a 10-bit converter for eight channel inputs.
     14
     15properties:
     16  compatible:
     17    const: nuvoton,npcm750-adc
     18
     19  reg:
     20    maxItems: 1
     21
     22  interrupts:
     23    maxItems: 1
     24    description: ADC interrupt, should be set for falling edge.
     25
     26  resets:
     27    maxItems: 1
     28
     29  clocks:
     30    maxItems: 1
     31    description: If not provided the defulat ADC sample rate will be used.
     32
     33  vref-supply:
     34    description: If not supplied, the internal voltage reference will be used.
     35
     36  "#io-channel-cells":
     37    const: 1
     38
     39required:
     40  - compatible
     41  - reg
     42  - interrupts
     43  - resets
     44
     45additionalProperties: false
     46
     47examples:
     48  - |
     49    #include <dt-bindings/interrupt-controller/irq.h>
     50    #include <dt-bindings/interrupt-controller/arm-gic.h>
     51    #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
     52    #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
     53    soc {
     54        #address-cells = <1>;
     55        #size-cells = <1>;
     56        adc@f000c000 {
     57            compatible = "nuvoton,npcm750-adc";
     58            reg = <0xf000c000 0x8>;
     59            interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
     60            clocks = <&clk NPCM7XX_CLK_ADC>;
     61            resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
     62        };
     63    };
     64...