cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ti,adc12138.yaml (2180B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/iio/adc/ti,adc12138.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Texas Instruments ADC12138 and similar self-calibrating ADCs
      8
      9maintainers:
     10  - Akinobu Mita <akinobu.mita@gmail.com>
     11
     12description: |
     13  13 bit ADCs with 1, 2 or 8 inputs and self calibrating circuitry to
     14  correct for linearity, zero and full scale errors.
     15
     16properties:
     17  compatible:
     18    enum:
     19      - ti,adc12130
     20      - ti,adc12132
     21      - ti,adc12138
     22
     23  reg:
     24    maxItems: 1
     25
     26  interrupts:
     27    maxItems: 1
     28    description: End of Conversion (EOC) interrupt
     29
     30  clocks:
     31    maxItems: 1
     32    description: Conversion clock input.
     33
     34  spi-max-frequency: true
     35
     36  vref-p-supply:
     37    description: The regulator supply for positive analog voltage reference
     38
     39  vref-n-supply:
     40    description: |
     41      The regulator supply for negative analog voltage reference
     42      (Note that this must not go below GND or exceed vref-p)
     43      If not specified, this is assumed to be analog ground.
     44
     45  ti,acquisition-time:
     46    $ref: /schemas/types.yaml#/definitions/uint32
     47    enum: [ 6, 10, 18, 34 ]
     48    description: |
     49      The number of conversion clock periods for the S/H's acquisition time.
     50      For high source impedances, this value can be increased to 18 or 34.
     51      For less ADC accuracy and/or slower CCLK frequencies this value may be
     52      decreased to 6.  See section 6.0 INPUT SOURCE RESISTANCE in the
     53      datasheet for details.
     54
     55  "#io-channel-cells":
     56    const: 1
     57
     58required:
     59  - compatible
     60  - reg
     61  - interrupts
     62  - clocks
     63  - vref-p-supply
     64
     65additionalProperties: false
     66
     67examples:
     68  - |
     69    #include <dt-bindings/interrupt-controller/irq.h>
     70    spi {
     71        #address-cells = <1>;
     72        #size-cells = <0>;
     73
     74        adc@0 {
     75            compatible = "ti,adc12138";
     76            reg = <0>;
     77            interrupts = <28 IRQ_TYPE_EDGE_RISING>;
     78            interrupt-parent = <&gpio1>;
     79            clocks = <&cclk>;
     80            vref-p-supply = <&ldo4_reg>;
     81            spi-max-frequency = <5000000>;
     82            ti,acquisition-time = <6>;
     83            #io-channel-cells = <1>;
     84        };
     85    };
     86...