cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

brcm,l2-intc.yaml (1562B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/interrupt-controller/brcm,l2-intc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Broadcom Generic Level 2 Interrupt Controller
      8
      9maintainers:
     10  - Florian Fainelli <f.fainelli@gmail.com>
     11
     12allOf:
     13  - $ref: /schemas/interrupt-controller.yaml#
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - items:
     19          - enum:
     20              - brcm,hif-spi-l2-intc
     21              - brcm,upg-aux-aon-l2-intc
     22          - const: brcm,l2-intc
     23      - items:
     24          - enum:
     25              - brcm,bcm2711-l2-intc
     26          - const: brcm,l2-intc
     27      - items:
     28          - const: brcm,bcm7271-l2-intc
     29      - items:
     30          - const: brcm,l2-intc
     31
     32  reg:
     33    maxItems: 1
     34    description: >
     35      Specifies the base physical address and size of the registers
     36
     37  interrupt-controller: true
     38
     39  "#interrupt-cells":
     40    const: 1
     41
     42  interrupts:
     43    maxItems: 1
     44
     45  interrupt-names:
     46    maxItems: 1
     47
     48  brcm,irq-can-wake:
     49    type: boolean
     50    description: >
     51      If present, this means the L2 controller can be used as a wakeup source
     52      for system suspend/resume.
     53
     54additionalProperties: false
     55
     56required:
     57  - compatible
     58  - reg
     59  - interrupt-controller
     60  - "#interrupt-cells"
     61  - interrupts
     62
     63examples:
     64  - |
     65    hif_intr2_intc: interrupt-controller@f0441000 {
     66      compatible = "brcm,l2-intc";
     67      reg = <0xf0441000 0x30>;
     68      interrupt-controller;
     69      #interrupt-cells = <1>;
     70      interrupt-parent = <&intc>;
     71      interrupts = <0x0 0x20 0x0>;
     72    };